Dear ports@ readers,
as first follow-up of my previous e-mail, enclosed please find the port
for abc [1]:
[... snip ...]
ABC: A System for Sequential Synthesis and Verification
ABC is a growing software system for synthesis and verification of
binary sequential logic circuits appearing in synchronous hardware
designs. ABC combines scalable logic optimization based on And-Inverter
Graphs (AIGs), optimal-delay DAG-based technology mapping for look-up
tables and standard cells, and innovative algorithms for sequential
synthesis and verification.
[... snip ...]
It compiles flawlessly and runs as expected (tested on amd64 only, for a
limited set of test-cases, no test suite available).
We only need to patch the Makefile, in order to correctly set the
compiler option when the __OpenBSD__ identifier is found.
Please consider that this is my first attempt to build a quality level
port, so please have a careful look at it and let me know your comments.
Of course, I step-up for maintainership.
[1] https://people.eecs.berkeley.edu/~alanmi/abc/
--
Alessandro DE LAURENZIS
[mailto:just22@atlantide.t28.net]
Web: http://www.atlantide.t28.net
LinkedIn: http://it.linkedin.com/in/delaurenzis
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