Friday, January 05, 2018

Re: Kernel memory leaking on Intel CPUs?

They make their own via the /Moscow Center of SPARC Technologies./
Check out the Elbrus architecture, its pretty clever. It can run native
SPARC binaries and also has a fairly efficient x86 compatibility layer
built into the hardware. The way they achieve bi-endian capability is
pretty neat, in addition to their aggressively large (20+) instructions
per cycle when running native Elbrus code compiled with their VLIW support.


On 01/04/18 14:02, Rupert Gallagher wrote:
> The Intel flop hits the US .mil as well, because
> they depend on COTS Xeons.
>
> I pity the Russians. I wonder if they pay through the nose for
> Oracle's power hungry hardware, or make it cheaper and power efficient
> of their own.
>
> On Thu, Jan 4, 2018 at 18:28, Jordan Geoghegan <jgeoghegan60@gmail.com
> <mailto:jgeoghegan60@gmail.com>> wrote:
>> The Russians heavily use SPARC for aerospace/military applications as
>> well as their in house domestic-use-only Elbrus machines, for what I
>> imagine to be reasons precisely like this.

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