Re: Fwd: [SECURITY] [UPDATE] lang/node to

Index: Makefile
===================================================================
RCS file: /cvs/ports/lang/node/Makefile,v
retrieving revision 1.94
diff -u -p -r1.94 Makefile
--- Makefile 1 Feb 2022 22:17:58 -0000 1.94
+++ Makefile 3 Feb 2022 16:51:54 -0000
@@ -15,6 +15,7 @@ DISTFILES = node-pledge-{}${PLEDGE_VER}

DISTNAME = node-${NODE_VERSION}
PKGNAME = ${DISTNAME:S/v//g}
+REVISION = 0

MASTER_SITES0 = https://github.com/qbit/node-pledge/archive/

Index: patches/patch-deps_v8_src_wasm_baseline_ia32_liftoff-assembler-ia32_h
===================================================================
RCS file: patches/patch-deps_v8_src_wasm_baseline_ia32_liftoff-assembler-ia32_h
diff -N patches/patch-deps_v8_src_wasm_baseline_ia32_liftoff-assembler-ia32_h
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ patches/patch-deps_v8_src_wasm_baseline_ia32_liftoff-assembler-ia32_h 3 Feb 2022 16:51:54 -0000
@@ -0,0 +1,104 @@
+$OpenBSD$
+
+Index: deps/v8/src/wasm/baseline/ia32/liftoff-assembler-ia32.h
+--- deps/v8/src/wasm/baseline/ia32/liftoff-assembler-ia32.h.orig
++++ deps/v8/src/wasm/baseline/ia32/liftoff-assembler-ia32.h
+@@ -431,7 +431,7 @@ void LiftoffAssembler::StoreTaggedPointer(Register dst
+ }
+
+ void LiftoffAssembler::Load(LiftoffRegister dst, Register src_addr,
+- Register offset_reg, uint32_t offset_imm,
++ Register offset_reg, uintptr_t offset_imm,
+ LoadType type, LiftoffRegList pinned,
+ uint32_t* protected_load_pc, bool is_load_mem,
+ bool i64_offset) {
+@@ -508,7 +508,7 @@ void LiftoffAssembler::Load(LiftoffRegister dst, Regis
+ }
+
+ void LiftoffAssembler::Store(Register dst_addr, Register offset_reg,
+- uint32_t offset_imm, LiftoffRegister src,
++ uintptr_t offset_imm, LiftoffRegister src,
+ StoreType type, LiftoffRegList pinned,
+ uint32_t* protected_store_pc, bool is_store_mem) {
+ DCHECK_EQ(type.value_type() == kWasmI64, src.is_gp_pair());
+@@ -576,7 +576,7 @@ void LiftoffAssembler::Store(Register dst_addr, Regist
+ }
+
+ void LiftoffAssembler::AtomicLoad(LiftoffRegister dst, Register src_addr,
+- Register offset_reg, uint32_t offset_imm,
++ Register offset_reg, uintptr_t offset_imm,
+ LoadType type, LiftoffRegList pinned) {
+ if (type.value() != LoadType::kI64Load) {
+ Load(dst, src_addr, offset_reg, offset_imm, type, pinned, nullptr, true);
+@@ -595,7 +595,7 @@ void LiftoffAssembler::AtomicLoad(LiftoffRegister dst,
+ }
+
+ void LiftoffAssembler::AtomicStore(Register dst_addr, Register offset_reg,
+- uint32_t offset_imm, LiftoffRegister src,
++ uintptr_t offset_imm, LiftoffRegister src,
+ StoreType type, LiftoffRegList pinned) {
+ DCHECK_NE(offset_reg, no_reg);
+ DCHECK_LE(offset_imm, std::numeric_limits<int32_t>::max());
+@@ -937,7 +937,7 @@ inline void AtomicBinop64(LiftoffAssembler* lasm, Bino
+ } // namespace liftoff
+
+ void LiftoffAssembler::AtomicAdd(Register dst_addr, Register offset_reg,
+- uint32_t offset_imm, LiftoffRegister value,
++ uintptr_t offset_imm, LiftoffRegister value,
+ LiftoffRegister result, StoreType type) {
+ if (type.value() == StoreType::kI64Store) {
+ liftoff::AtomicBinop64(this, liftoff::kAdd, dst_addr, offset_reg,
+@@ -950,7 +950,7 @@ void LiftoffAssembler::AtomicAdd(Register dst_addr, Re
+ }
+
+ void LiftoffAssembler::AtomicSub(Register dst_addr, Register offset_reg,
+- uint32_t offset_imm, LiftoffRegister value,
++ uintptr_t offset_imm, LiftoffRegister value,
+ LiftoffRegister result, StoreType type) {
+ if (type.value() == StoreType::kI64Store) {
+ liftoff::AtomicBinop64(this, liftoff::kSub, dst_addr, offset_reg,
+@@ -962,7 +962,7 @@ void LiftoffAssembler::AtomicSub(Register dst_addr, Re
+ }
+
+ void LiftoffAssembler::AtomicAnd(Register dst_addr, Register offset_reg,
+- uint32_t offset_imm, LiftoffRegister value,
++ uintptr_t offset_imm, LiftoffRegister value,
+ LiftoffRegister result, StoreType type) {
+ if (type.value() == StoreType::kI64Store) {
+ liftoff::AtomicBinop64(this, liftoff::kAnd, dst_addr, offset_reg,
+@@ -975,7 +975,7 @@ void LiftoffAssembler::AtomicAnd(Register dst_addr, Re
+ }
+
+ void LiftoffAssembler::AtomicOr(Register dst_addr, Register offset_reg,
+- uint32_t offset_imm, LiftoffRegister value,
++ uintptr_t offset_imm, LiftoffRegister value,
+ LiftoffRegister result, StoreType type) {
+ if (type.value() == StoreType::kI64Store) {
+ liftoff::AtomicBinop64(this, liftoff::kOr, dst_addr, offset_reg, offset_imm,
+@@ -988,7 +988,7 @@ void LiftoffAssembler::AtomicOr(Register dst_addr, Reg
+ }
+
+ void LiftoffAssembler::AtomicXor(Register dst_addr, Register offset_reg,
+- uint32_t offset_imm, LiftoffRegister value,
++ uintptr_t offset_imm, LiftoffRegister value,
+ LiftoffRegister result, StoreType type) {
+ if (type.value() == StoreType::kI64Store) {
+ liftoff::AtomicBinop64(this, liftoff::kXor, dst_addr, offset_reg,
+@@ -1001,7 +1001,7 @@ void LiftoffAssembler::AtomicXor(Register dst_addr, Re
+ }
+
+ void LiftoffAssembler::AtomicExchange(Register dst_addr, Register offset_reg,
+- uint32_t offset_imm,
++ uintptr_t offset_imm,
+ LiftoffRegister value,
+ LiftoffRegister result, StoreType type) {
+ if (type.value() == StoreType::kI64Store) {
+@@ -1015,7 +1015,7 @@ void LiftoffAssembler::AtomicExchange(Register dst_add
+ }
+
+ void LiftoffAssembler::AtomicCompareExchange(
+- Register dst_addr, Register offset_reg, uint32_t offset_imm,
++ Register dst_addr, Register offset_reg, uintptr_t offset_imm,
+ LiftoffRegister expected, LiftoffRegister new_value, LiftoffRegister result,
+ StoreType type) {
+ // We expect that the offset has already been added to {dst_addr}, and no
Index: patches/patch-node_gyp
===================================================================
RCS file: patches/patch-node_gyp
diff -N patches/patch-node_gyp
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ patches/patch-node_gyp 3 Feb 2022 16:51:54 -0000
@@ -0,0 +1,36 @@
+$OpenBSD$
+
+Index: node.gyp
+--- node.gyp.orig
++++ node.gyp
+@@ -356,7 +356,7 @@
+ '<(SHARED_INTERMEDIATE_DIR)' # for node_natives.h
+ ],
+ 'dependencies': [
+- 'deps/googletest/googletest.gyp:gtest_prod',
++ # 'deps/googletest/googletest.gyp:gtest_prod',
+ 'deps/histogram/histogram.gyp:histogram',
+ 'deps/uvwasi/uvwasi.gyp:uvwasi',
+ ],
+@@ -1080,8 +1080,8 @@
+
+ 'dependencies': [
+ '<(node_lib_target_name)',
+- 'deps/googletest/googletest.gyp:gtest',
+- 'deps/googletest/googletest.gyp:gtest_main',
++ #'deps/googletest/googletest.gyp:gtest',
++ #'deps/googletest/googletest.gyp:gtest_main',
+ 'deps/histogram/histogram.gyp:histogram',
+ 'deps/uvwasi/uvwasi.gyp:uvwasi',
+ 'node_dtrace_header',
+@@ -1155,6 +1155,10 @@
+ }],
+ ['OS=="solaris"', {
+ 'ldflags': [ '-I<(SHARED_INTERMEDIATE_DIR)' ]
++ }],
++ # Skip cctest while building for OpenBSD
++ [ 'OS=="openbsd"', {
++ 'type': 'none',
+ }],
+ # Skip cctest while building shared lib node for Windows
+ [ 'OS=="win" and node_shared=="true"', {
I've included another patch nicked from www/chromium that looks like it
addresses this issue. I had no way of testing i386, so I didn't just
blindly include it at first.

Note: www/chromium includes another ia32 patch, that's not needed in
lang/node and probably in www/chromium anymore:

patch-v8_src_compiler_backend_ia32_instruction-selector-ia32_cc
--> That was fixed upstream with
https://github.com/v8/v8/commit/6b2e9f6407fcb0b688f2cbdcda06e2286e84633b


The other patch should fix builds breaking on machines with devel/gtest
installed from ports. In those cases, node picked up and used the
(ancient) ports version, instead of the bundled one.

Note: This also removes / breaks tests!

On 2/3/22 16:08, Stuart Henderson wrote:
> This fails on i386; various errors like
>
> ../deps/v8/src/wasm/baseline/ia32/liftoff-assembler-ia32.h:433:24: error: out-of-line definition of 'Load' does not match any declaration in 'v8::internal::wasm::LiftoffAssembler'
>
> gzipped build log attached.
>
>