Zitat von Matthew Ernisse <mernisse@ub3rgeek.net>:
> On Mon, Jul 31, 2023 at 06:48:42PM +0200, Robert Palm said:
>> Cannot get network working on my VisionFive 2 (ping a different machine).
>>
>> Any ideas? Thanks!
>
> Does either side see ARP traffic for the other? (arp -an) Do you
> see traffic leaving your OpenBSD machine? (tcpdump(8) is your
> friend) Check for host firewalls on both sides.
>
>> FreeBSD machine:
>
> [ snip ]
>
>> media: Ethernet autoselect (100baseTX <half-duplex>)
>
> 100/half is a bit odd these days, is this machine able to
> communicate to other things on this ethernet link?
>
> --
> Matthew Ernisse
> https://www.going-flying.com/
Thanks a lot for your suggestions. I will try to check that.
One thing I did notice is that there exist 2 versions of the VF2.
1.2A
PHY0 YT8531C 2 U6 10/100/1000Mbit/sec
PHY1 YT8512C U39 10/100Mbit/sec
1.3B
PHY0 YT8531C U6 10/100/1000Mbit/sec
PHY1 YT8531C U7 10/100/1000Mbit/sec
https://doc-en.rvspace.org/VisionFive2/PDF/RV002_V1.3B_20230208.PDF
https://doc-en.rvspace.org/VisionFive2/PDF/SCH_RV002_V1.2A_20221216.pdf
I own the 1.2A.
I cannot boot / install OpenBSD using the latest release .dtb file
provided by starfive:
https://github.com/starfive-tech/VisionFive2/releases/download/VF2_v3.1.5/jh7110-visionfive-v2.dtb
So Michael was so kind to send me a
jh7110-starfive-visionfive-2-v1.3b.dtb , c.f.
https://marc.info/?l=openbsd-misc&m=169046816826966&w=2
It works very well to install and boot OpenBSD, but I assume as it is
meant for the 1.3B version the network is causing "problems" with my
version ?
I asked back to Michael and he said network works for him with his
1.3B version.
In general I can see a commit:
* Add support for the Motorcomm YT8521/YT8531 PHYs. Since these PHYs may
need various board-dependent tweaks, pass the device tree node down
to the PHY driver such that we can look at various properties to make
the necessary tweaks. Enable ytphy(4) on riscv64.
So, is the YT8512C supported already ? If not I assume I cannot use my PHY1.
But, the PHY0 should work as it is the same as the 1.3B version uses.
But maybe the .dtb does not fit properly ?
Does anyone has the 1.2A version and can provide a .dtb file that works?
Below ethernet parts of the two (decompiled) .dtb versions I have.
Can anyone make sense out of differences, please ?
Many thanks for looking at it.
----------------------------------------------------
jh7110-visionfive-v2.dts:
----------------------------------------------------
ethernet@16030000 {
compatible = "starfive,dwmac", "snps,dwmac-5.10a";
reg = <0x0 0x16030000 0x0 0x10000>;
clock-names = "gtx", "tx", "ptp_ref", "stmmaceth", "pclk", "gtxc",
"rmii_rtx";
clocks = <0x8 0x6c 0x8 0xe0 0x8 0x6d 0x8 0xdd 0x8 0xde 0x8 0x6f 0x8 0xdf>;
resets = <0x21 0xa1 0x21 0xa0>;
reset-names = "ahb", "stmmaceth";
interrupts = <0x7 0x6 0x5>;
interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
max-frame-size = <0x2328>;
phy-mode = "rgmii-id";
snps,multicast-filter-bins = <0x40>;
snps,perfect-filter-entries = <0x80>;
rx-fifo-depth = <0x800>;
tx-fifo-depth = <0x800>;
snps,fixed-burst;
snps,no-pbl-x8;
snps,force_thresh_dma_mode;
snps,axi-config = <0x3c>;
snps,tso;
snps,en-tx-lpi-clockgating;
snps,en-lpi;
snps,write-requests = <0x4>;
snps,read-requests = <0x4>;
snps,burst-map = <0x7>;
snps,txpbl = <0x10>;
snps,rxpbl = <0x10>;
status = "okay";
#address-cells = <0x1>;
#size-cells = <0x0>;
ethernet-phy@0 {
rgmii_sw_dr_2 = <0x0>;
rgmii_sw_dr = <0x3>;
rgmii_sw_dr_rxc = <0x6>;
rxc_dly_en = <0x0>;
rx_delay_sel = <0xa>;
tx_delay_sel_fe = <0x5>;
tx_delay_sel = <0xa>;
tx_inverted_10 = <0x1>;
tx_inverted_100 = <0x1>;
tx_inverted_1000 = <0x1>;
};
};
ethernet@16040000 {
compatible = "starfive,dwmac", "snps,dwmac-5.10a";
reg = <0x0 0x16040000 0x0 0x10000>;
clock-names = "gtx", "tx", "ptp_ref", "stmmaceth", "pclk", "gtxc",
"rmii_rtx";
clocks = <0x8 0x64 0x8 0x69 0x8 0x66 0x8 0x61 0x8 0x62 0x8 0x6b 0x8 0x65>;
resets = <0x21 0x43 0x21 0x42>;
reset-names = "ahb", "stmmaceth";
interrupts = <0x4e 0x4d 0x4c>;
interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
max-frame-size = <0x2328>;
phy-mode = "rgmii-id";
snps,multicast-filter-bins = <0x40>;
snps,perfect-filter-entries = <0x80>;
rx-fifo-depth = <0x800>;
tx-fifo-depth = <0x800>;
snps,fixed-burst;
snps,no-pbl-x8;
snps,force_thresh_dma_mode;
snps,axi-config = <0x3c>;
snps,tso;
snps,en-tx-lpi-clockgating;
snps,en-lpi;
snps,write-requests = <0x4>;
snps,read-requests = <0x4>;
snps,burst-map = <0x7>;
snps,txpbl = <0x10>;
snps,rxpbl = <0x10>;
status = "okay";
#address-cells = <0x1>;
#size-cells = <0x0>;
ethernet-phy@1 {
rgmii_sw_dr_2 = <0x0>;
rgmii_sw_dr = <0x3>;
rgmii_sw_dr_rxc = <0x6>;
tx_delay_sel_fe = <0x5>;
tx_delay_sel = <0x0>;
rxc_dly_en = <0x0>;
rx_delay_sel = <0x2>;
tx_inverted_10 = <0x1>;
tx_inverted_100 = <0x1>;
tx_inverted_1000 = <0x0>;
};
};
----------------------------------------------------
jh7110-starfive-visionfive-2-v1.3b.dts:
----------------------------------------------------
ethernet@16030000 {
compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
reg = <0x0 0x16030000 0x0 0x10000>;
clocks = <0x2a 0x3 0x2a 0x2 0x3 0x6d 0x2a 0x6 0x3 0x6f>;
clock-names = "stmmaceth", "pclk", "ptp_ref", "tx", "gtx";
resets = <0x2a 0x0 0x2a 0x1>;
reset-names = "stmmaceth", "ahb";
interrupts = <0x7 0x6 0x5>;
interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
rx-fifo-depth = <0x800>;
tx-fifo-depth = <0x800>;
snps,multicast-filter-bins = <0x40>;
snps,perfect-filter-entries = <0x8>;
snps,fixed-burst;
snps,no-pbl-x8;
snps,force_thresh_dma_mode;
snps,axi-config = <0x2b>;
snps,tso;
snps,en-tx-lpi-clockgating;
snps,txpbl = <0x10>;
snps,rxpbl = <0x10>;
starfive,syscon = <0x2c 0xc 0x12>;
status = "okay";
phy-handle = <0x2d>;
phy-mode = "rgmii-id";
starfive,tx-use-rgmii-clk;
assigned-clocks = <0x2a 0x5>;
assigned-clock-parents = <0x2a 0x4>;
mdio {
#address-cells = <0x1>;
#size-cells = <0x0>;
compatible = "snps,dwmac-mdio";
ethernet-phy@0 {
reg = <0x0>;
motorcomm,tx-clk-adj-enabled;
motorcomm,tx-clk-100-inverted;
motorcomm,tx-clk-1000-inverted;
motorcomm,rx-clk-driver-strength = <0x6>;
motorcomm,rx-data-driver-strength = <0x3>;
rx-internal-delay-ps = <0x5dc>;
tx-internal-delay-ps = <0x5dc>;
phandle = <0x2d>;
};
};
};
ethernet@16040000 {
compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
reg = <0x0 0x16040000 0x0 0x10000>;
clocks = <0x3 0x62 0x3 0x61 0x3 0x66 0x3 0x6a 0x3 0x6b>;
clock-names = "stmmaceth", "pclk", "ptp_ref", "tx", "gtx";
resets = <0x3 0x42 0x3 0x43>;
reset-names = "stmmaceth", "ahb";
interrupts = <0x4e 0x4d 0x4c>;
interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
rx-fifo-depth = <0x800>;
tx-fifo-depth = <0x800>;
snps,multicast-filter-bins = <0x40>;
snps,perfect-filter-entries = <0x8>;
snps,fixed-burst;
snps,no-pbl-x8;
snps,force_thresh_dma_mode;
snps,axi-config = <0x2b>;
snps,tso;
snps,en-tx-lpi-clockgating;
snps,txpbl = <0x10>;
snps,rxpbl = <0x10>;
starfive,syscon = <0x29 0x90 0x2>;
status = "okay";
phy-handle = <0x2e>;
phy-mode = "rgmii-id";
starfive,tx-use-rgmii-clk;
assigned-clocks = <0x3 0x69>;
assigned-clock-parents = <0x3 0x65>;
mdio {
#address-cells = <0x1>;
#size-cells = <0x0>;
compatible = "snps,dwmac-mdio";
ethernet-phy@1 {
reg = <0x0>;
motorcomm,tx-clk-adj-enabled;
motorcomm,tx-clk-100-inverted;
motorcomm,rx-clk-driver-strength = <0x6>;
motorcomm,rx-data-driver-strength = <0x3>;
rx-internal-delay-ps = <0x12c>;
tx-internal-delay-ps = <0x0>;
phandle = <0x2e>;
};
};
};
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