Re: Update arm64-qcom-dtb firmware

> Date: Tue, 21 Jan 2025 21:56:41 +0100
> From: Kirill A. Korinsky <kirill@korins.ky>
>
> On Tue, 21 Jan 2025 21:42:40 +0100,
> Mark Kettenis <mark.kettenis@xs4all.nl> wrote:
> >
> > [ Now with diff ]
> >
> > This rebases things on top of Linux 6.13 and adds some recent patches from:
> >
> > https://github.com/SpieringsAE/linux/tree/wip/x1e80100-6.13
> >
> > which in turn includes patches from:
> >
> > https://github.com/jhovold/linux/tree/wip/x1e80100-6.13
> >
> > The vast majority of these patches have received positive reviews on
> > the relevant Linux mailing list, and some of them are already present
> > in linux-next. They mostly bring support for more USB ports on t14s
> > and vivobook.
> >
> > Probably needs some testing, especially on the hp and samsung
> > machines as those devices are not present upstream.
> >
> > ok?
> >
>
> May I ask you to incluide DTS for
> https://lore.kernel.org/linux-devicetree/87jzazzx17.wl-kirill@korins.ky/

New diff that includes that.

ok?


Index: sysutils/firmware/arm64-qcom-dtb/Makefile
===================================================================
RCS file: /cvs/ports/sysutils/firmware/arm64-qcom-dtb/Makefile,v
diff -u -p -r1.20 Makefile
--- sysutils/firmware/arm64-qcom-dtb/Makefile 17 Nov 2024 16:45:15 -0000 1.20
+++ sysutils/firmware/arm64-qcom-dtb/Makefile 25 Jan 2025 12:51:42 -0000
@@ -1,7 +1,7 @@
FW_DRIVER= arm64-qcom-dtb
-FW_VER= 2.3
+FW_VER= 2.4

-DISTNAME= devicetree-rebasing-6.11-dts
+DISTNAME= devicetree-rebasing-6.13-dts

# can be redistributed, but shouldn't be in normal packages directory as
# this is only meant for use with fw_update.
@@ -20,8 +20,14 @@ MAKE_ENV += CPP=clang-cpp
DTBS= sc8280xp-lenovo-thinkpad-x13s.dtb \
x1e78100-lenovo-thinkpad-t14s.dtb \
x1e80100-asus-vivobook-s15.dtb \
+ x1e80100-crd.dtb \
+ x1e80100-dell-xps13-9345.dtb \
+ x1e80100-honor-magicbook-art-14.dtb \
x1e80100-hp-omnibook-x14.dtb \
x1e80100-lenovo-yoga-slim7x.dtb \
+ x1e80100-microsoft-romulus13.dtb \
+ x1e80100-microsoft-romulus15.dtb \
+ x1e80100-qcp.dtb \
x1e80100-samsung-galaxy-book4-edge.dtb

ALL_TARGET=
Index: sysutils/firmware/arm64-qcom-dtb/distinfo
===================================================================
RCS file: /cvs/ports/sysutils/firmware/arm64-qcom-dtb/distinfo,v
diff -u -p -r1.2 distinfo
--- sysutils/firmware/arm64-qcom-dtb/distinfo 21 Sep 2024 17:14:17 -0000 1.2
+++ sysutils/firmware/arm64-qcom-dtb/distinfo 25 Jan 2025 12:51:42 -0000
@@ -1,2 +1,2 @@
-SHA256 (firmware/devicetree-rebasing-6.11-dts.tar.gz) = cSkEweN++8qCEaUaST73Rbkw7JVl4eTeRODFd3LgBKA=
-SIZE (firmware/devicetree-rebasing-6.11-dts.tar.gz) = 9145072
+SHA256 (firmware/devicetree-rebasing-6.13-dts.tar.gz) = ukVSSdtl5Vf2G3/vsvWZC4wGOI8kIzNeK1A+qrMNF1o=
+SIZE (firmware/devicetree-rebasing-6.13-dts.tar.gz) = 9463945
Index: sysutils/firmware/arm64-qcom-dtb/patches/patch-src_arm64_qcom_sc8280xp-lenovo-thinkpad-x13s_dts
===================================================================
RCS file: /cvs/ports/sysutils/firmware/arm64-qcom-dtb/patches/patch-src_arm64_qcom_sc8280xp-lenovo-thinkpad-x13s_dts,v
diff -u -p -r1.3 patch-src_arm64_qcom_sc8280xp-lenovo-thinkpad-x13s_dts
--- sysutils/firmware/arm64-qcom-dtb/patches/patch-src_arm64_qcom_sc8280xp-lenovo-thinkpad-x13s_dts 23 Sep 2024 17:48:28 -0000 1.3
+++ sysutils/firmware/arm64-qcom-dtb/patches/patch-src_arm64_qcom_sc8280xp-lenovo-thinkpad-x13s_dts 25 Jan 2025 12:51:42 -0000
@@ -1,7 +1,7 @@
Index: src/arm64/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
--- src/arm64/qcom/sc8280xp-lenovo-thinkpad-x13s.dts.orig
+++ src/arm64/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
-@@ -847,14 +847,14 @@
+@@ -959,14 +959,14 @@
pinctrl-names = "default";
pinctrl-0 = <&pcie3a_default>;

@@ -18,7 +18,7 @@ Index: src/arm64/qcom/sc8280xp-lenovo-th
};

&pcie4 {
-@@ -1299,7 +1299,7 @@
+@@ -1417,7 +1417,7 @@
};

&usb_2 {
Index: sysutils/firmware/arm64-qcom-dtb/patches/patch-src_arm64_qcom_x1e78100-lenovo-thinkpad-t14s_dts
===================================================================
RCS file: /cvs/ports/sysutils/firmware/arm64-qcom-dtb/patches/patch-src_arm64_qcom_x1e78100-lenovo-thinkpad-t14s_dts,v
diff -u -p -r1.2 patch-src_arm64_qcom_x1e78100-lenovo-thinkpad-t14s_dts
--- sysutils/firmware/arm64-qcom-dtb/patches/patch-src_arm64_qcom_x1e78100-lenovo-thinkpad-t14s_dts 21 Sep 2024 17:14:17 -0000 1.2
+++ sysutils/firmware/arm64-qcom-dtb/patches/patch-src_arm64_qcom_x1e78100-lenovo-thinkpad-t14s_dts 25 Jan 2025 12:51:42 -0000
@@ -1,815 +1,729 @@
Index: src/arm64/qcom/x1e78100-lenovo-thinkpad-t14s.dts
--- src/arm64/qcom/x1e78100-lenovo-thinkpad-t14s.dts.orig
+++ src/arm64/qcom/x1e78100-lenovo-thinkpad-t14s.dts
-@@ -0,0 +1,811 @@
-+// SPDX-License-Identifier: BSD-3-Clause
-+/*
-+ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
-+ * Copyright (c) 2024, Linaro Limited
-+ */
-+
-+/dts-v1/;
-+
-+#include <dt-bindings/gpio/gpio.h>
-+#include <dt-bindings/input/gpio-keys.h>
-+#include <dt-bindings/input/input.h>
-+#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
-+
-+#include "x1e80100.dtsi"
-+#include "x1e80100-pmics.dtsi"
-+
-+/ {
-+ model = "Lenovo ThinkPad T14s Gen 6";
-+ compatible = "lenovo,thinkpad-t14s", "qcom,x1e78100", "qcom,x1e80100";
-+ chassis-type = "laptop";
-+
-+ gpio-keys {
-+ compatible = "gpio-keys";
-+
-+ pinctrl-0 = <&hall_int_n_default>;
-+ pinctrl-names = "default";
-+
-+ switch-lid {
-+ gpios = <&tlmm 92 GPIO_ACTIVE_LOW>;
-+ linux,input-type = <EV_SW>;
-+ linux,code = <SW_LID>;
-+ wakeup-source;
-+ wakeup-event-action = <EV_ACT_DEASSERTED>;
-+ };
-+ };
+@@ -19,6 +19,10 @@
+ compatible = "lenovo,thinkpad-t14s", "qcom,x1e78100", "qcom,x1e80100";
+ chassis-type = "laptop";
+
++ aliases {
++ serial1 = &uart14;
++ };
++
+ gpio-keys {
+ compatible = "gpio-keys";
+
+@@ -66,9 +70,17 @@
+ reg = <1>;
+
+ pmic_glink_ss0_ss_in: endpoint {
+- remote-endpoint = <&usb_1_ss0_qmpphy_out>;
++ remote-endpoint = <&retimer_ss0_ss_out>;
+ };
+ };
+
-+ pmic-glink {
-+ compatible = "qcom,x1e80100-pmic-glink",
-+ "qcom,sm8550-pmic-glink",
-+ "qcom,pmic-glink";
-+ orientation-gpios = <&tlmm 121 GPIO_ACTIVE_HIGH>,
-+ <&tlmm 123 GPIO_ACTIVE_HIGH>;
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ /* Display-adjacent port */
-+ connector@0 {
-+ compatible = "usb-c-connector";
-+ reg = <0>;
-+ power-role = "dual";
-+ data-role = "dual";
-+
-+ ports {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
++ port@2 {
++ reg = <2>;
+
-+ port@0 {
-+ reg = <0>;
-+
-+ pmic_glink_ss0_hs_in: endpoint {
-+ remote-endpoint = <&usb_1_ss0_dwc3_hs>;
++ pmic_glink_ss0_con_sbu_in: endpoint {
++ remote-endpoint = <&retimer_ss0_con_sbu_out>;
+ };
+ };
+ };
+ };
+
+@@ -95,9 +107,17 @@
+ reg = <1>;
+
+ pmic_glink_ss1_ss_in: endpoint {
+- remote-endpoint = <&usb_1_ss1_qmpphy_out>;
++ remote-endpoint = <&retimer_ss1_ss_out>;
+ };
+ };
+
-+ port@1 {
-+ reg = <1>;
++ port@2 {
++ reg = <2>;
+
-+ pmic_glink_ss0_ss_in: endpoint {
-+ remote-endpoint = <&usb_1_ss0_qmpphy_out>;
++ pmic_glink_ss1_con_sbu_in: endpoint {
++ remote-endpoint = <&retimer_ss1_con_sbu_out>;
+ };
+ };
-+ };
-+ };
-+
-+ /* User-adjacent port */
-+ connector@1 {
-+ compatible = "usb-c-connector";
-+ reg = <1>;
-+ power-role = "dual";
-+ data-role = "dual";
-+
-+ ports {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
+ };
+ };
+ };
+@@ -143,6 +163,102 @@
+ regulator-boot-on;
+ };
+
++ vreg_rtmr0_1p15: regulator-rtmr0-1p15 {
++ compatible = "regulator-fixed";
+
-+ port@0 {
-+ reg = <0>;
++ regulator-name = "VREG_RTMR0_1P15";
++ regulator-min-microvolt = <1150000>;
++ regulator-max-microvolt = <1150000>;
+
-+ pmic_glink_ss1_hs_in: endpoint {
-+ remote-endpoint = <&usb_1_ss1_dwc3_hs>;
-+ };
-+ };
-+
-+ port@1 {
-+ reg = <1>;
++ gpio = <&pmc8380_5_gpios 8 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
+
-+ pmic_glink_ss1_ss_in: endpoint {
-+ remote-endpoint = <&usb_1_ss1_qmpphy_out>;
-+ };
-+ };
-+ };
-+ };
-+ };
++ pinctrl-0 = <&usb0_pwr_1p15_reg_en>;
++ pinctrl-names = "default";
+
-+ reserved-memory {
-+ linux,cma {
-+ compatible = "shared-dma-pool";
-+ size = <0x0 0x8000000>;
-+ reusable;
-+ linux,cma-default;
-+ };
++ regulator-boot-on;
+ };
+
-+ vreg_edp_3p3: regulator-edp-3p3 {
++ vreg_rtmr0_1p8: regulator-rtmr0-1p8 {
+ compatible = "regulator-fixed";
+
-+ regulator-name = "VREG_EDP_3P3";
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
++ regulator-name = "VREG_RTMR0_1P8";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
+
-+ gpio = <&tlmm 70 GPIO_ACTIVE_HIGH>;
++ gpio = <&pm8550ve_9_gpios 8 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+
-+ pinctrl-0 = <&edp_reg_en>;
++ pinctrl-0 = <&usb0_1p8_reg_en>;
+ pinctrl-names = "default";
+
+ regulator-boot-on;
+ };
+
-+ vreg_nvme: regulator-nvme {
++ vreg_rtmr0_3p3: regulator-rtmr0-3p3 {
+ compatible = "regulator-fixed";
+
-+ regulator-name = "VREG_NVME_3P3";
++ regulator-name = "VREG_RTMR0_3P3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
-+ gpio = <&tlmm 18 GPIO_ACTIVE_HIGH>;
++ gpio = <&pm8550_gpios 11 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+
-+ pinctrl-0 = <&nvme_reg_en>;
++ pinctrl-0 = <&usb0_3p3_reg_en>;
+ pinctrl-names = "default";
++
++ regulator-boot-on;
+ };
+
-+ vph_pwr: regulator-vph-pwr {
++ vreg_rtmr1_1p15: regulator-rtmr1-1p15 {
+ compatible = "regulator-fixed";
+
-+ regulator-name = "vph_pwr";
-+ regulator-min-microvolt = <3700000>;
-+ regulator-max-microvolt = <3700000>;
++ regulator-name = "VREG_RTMR1_1P15";
++ regulator-min-microvolt = <1150000>;
++ regulator-max-microvolt = <1150000>;
++
++ gpio = <&tlmm 188 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
++
++ pinctrl-0 = <&usb1_pwr_1p15_reg_en>;
++ pinctrl-names = "default";
+
-+ regulator-always-on;
+ regulator-boot-on;
+ };
-+};
-+
-+&apps_rsc {
-+ regulators-0 {
-+ compatible = "qcom,pm8550-rpmh-regulators";
-+ qcom,pmic-id = "b";
-+
-+ vdd-bob1-supply = <&vph_pwr>;
-+ vdd-bob2-supply = <&vph_pwr>;
-+ vdd-l1-l4-l10-supply = <&vreg_s4c_1p8>;
-+ vdd-l2-l13-l14-supply = <&vreg_bob1>;
-+ vdd-l5-l16-supply = <&vreg_bob1>;
-+ vdd-l6-l7-supply = <&vreg_bob2>;
-+ vdd-l8-l9-supply = <&vreg_bob1>;
-+ vdd-l12-supply = <&vreg_s5j_1p2>;
-+ vdd-l15-supply = <&vreg_s4c_1p8>;
-+ vdd-l17-supply = <&vreg_bob2>;
-+
-+ vreg_bob1: bob1 {
-+ regulator-name = "vreg_bob1";
-+ regulator-min-microvolt = <3008000>;
-+ regulator-max-microvolt = <3960000>;
-+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
-+ };
+
-+ vreg_bob2: bob2 {
-+ regulator-name = "vreg_bob2";
-+ regulator-min-microvolt = <2504000>;
-+ regulator-max-microvolt = <3008000>;
-+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
-+ };
++ vreg_rtmr1_1p8: regulator-rtmr1-1p8 {
++ compatible = "regulator-fixed";
+
-+ vreg_l2b_3p0: ldo2 {
-+ regulator-name = "vreg_l2b_3p0";
-+ regulator-min-microvolt = <3072000>;
-+ regulator-max-microvolt = <3072000>;
-+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
-+ };
++ regulator-name = "VREG_RTMR1_1P8";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
+
-+ vreg_l4b_1p8: ldo4 {
-+ regulator-name = "vreg_l4b_1p8";
-+ regulator-min-microvolt = <1800000>;
-+ regulator-max-microvolt = <1800000>;
-+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
-+ };
++ gpio = <&tlmm 175 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
+
-+ vreg_l6b_1p8: ldo6 {
-+ regulator-name = "vreg_l6b_1p8";
-+ regulator-min-microvolt = <1800000>;
-+ regulator-max-microvolt = <2960000>;
-+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
-+ };
++ pinctrl-0 = <&usb1_pwr_1p8_reg_en>;
++ pinctrl-names = "default";
+
-+ vreg_l8b_3p0: ldo8 {
-+ regulator-name = "vreg_l8b_3p0";
-+ regulator-min-microvolt = <3072000>;
-+ regulator-max-microvolt = <3072000>;
-+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
-+ };
++ regulator-boot-on;
++ };
+
-+ vreg_l9b_2p9: ldo9 {
-+ regulator-name = "vreg_l9b_2p9";
-+ regulator-min-microvolt = <2960000>;
-+ regulator-max-microvolt = <2960000>;
-+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
-+ };
++ vreg_rtmr1_3p3: regulator-rtmr1-3p3 {
++ compatible = "regulator-fixed";
+
-+ vreg_l10b_1p8: ldo10 {
-+ regulator-name = "vreg_l10b_1p8";
-+ regulator-min-microvolt = <1800000>;
-+ regulator-max-microvolt = <1800000>;
-+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
-+ };
++ regulator-name = "VREG_RTMR1_3P3";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
+
-+ vreg_l12b_1p2: ldo12 {
-+ regulator-name = "vreg_l12b_1p2";
-+ regulator-min-microvolt = <1200000>;
-+ regulator-max-microvolt = <1200000>;
-+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
-+ };
++ gpio = <&tlmm 186 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
+
-+ vreg_l13b_3p0: ldo13 {
-+ regulator-name = "vreg_l13b_3p0";
-+ regulator-min-microvolt = <3072000>;
-+ regulator-max-microvolt = <3072000>;
-+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
-+ };
++ pinctrl-0 = <&usb1_pwr_3p3_reg_en>;
++ pinctrl-names = "default";
+
-+ vreg_l14b_3p0: ldo14 {
-+ regulator-name = "vreg_l14b_3p0";
-+ regulator-min-microvolt = <3072000>;
-+ regulator-max-microvolt = <3072000>;
-+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
-+ };
++ regulator-boot-on;
++ };
+
-+ vreg_l15b_1p8: ldo15 {
-+ regulator-name = "vreg_l15b_1p8";
-+ regulator-min-microvolt = <1800000>;
-+ regulator-max-microvolt = <1800000>;
-+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
-+ };
+ vph_pwr: regulator-vph-pwr {
+ compatible = "regulator-fixed";
+
+@@ -153,6 +269,107 @@
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
-+ vreg_l17b_2p5: ldo17 {
-+ regulator-name = "vreg_l17b_2p5";
-+ regulator-min-microvolt = <2504000>;
-+ regulator-max-microvolt = <2504000>;
-+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
-+ };
-+ };
++ vreg_wcn_3p3: regulator-wcn-3p3 {
++ compatible = "regulator-fixed";
+
-+ regulators-1 {
-+ compatible = "qcom,pm8550ve-rpmh-regulators";
-+ qcom,pmic-id = "c";
-+
-+ vdd-l1-supply = <&vreg_s5j_1p2>;
-+ vdd-l2-supply = <&vreg_s1f_0p7>;
-+ vdd-l3-supply = <&vreg_s1f_0p7>;
-+ vdd-s4-supply = <&vph_pwr>;
-+
-+ vreg_s4c_1p8: smps4 {
-+ regulator-name = "vreg_s4c_1p8";
-+ regulator-min-microvolt = <1856000>;
-+ regulator-max-microvolt = <2000000>;
-+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
-+ };
++ regulator-name = "VREG_WCN_3P3";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
+
-+ vreg_l1c_1p2: ldo1 {
-+ regulator-name = "vreg_l1c_1p2";
-+ regulator-min-microvolt = <1200000>;
-+ regulator-max-microvolt = <1200000>;
-+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
-+ };
++ gpio = <&tlmm 214 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
+
-+ vreg_l2c_0p8: ldo2 {
-+ regulator-name = "vreg_l2c_0p8";
-+ regulator-min-microvolt = <880000>;
-+ regulator-max-microvolt = <880000>;
-+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
-+ };
++ pinctrl-0 = <&wcn_sw_en>;
++ pinctrl-names = "default";
+
-+ vreg_l3c_0p8: ldo3 {
-+ regulator-name = "vreg_l3c_0p8";
-+ regulator-min-microvolt = <912000>;
-+ regulator-max-microvolt = <912000>;
-+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
-+ };
++ regulator-boot-on;
+ };
+
-+ regulators-2 {
-+ compatible = "qcom,pmc8380-rpmh-regulators";
-+ qcom,pmic-id = "d";
-+
-+ vdd-l1-supply = <&vreg_s1f_0p7>;
-+ vdd-l2-supply = <&vreg_s1f_0p7>;
-+ vdd-l3-supply = <&vreg_s4c_1p8>;
-+ vdd-s1-supply = <&vph_pwr>;
-+
-+ vreg_l1d_0p8: ldo1 {
-+ regulator-name = "vreg_l1d_0p8";
-+ regulator-min-microvolt = <880000>;
-+ regulator-max-microvolt = <880000>;
-+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
-+ };
++ /*
++ * TODO: These two regulators are actually part of the removable M.2
++ * card and not the CRD mainboard. Need to describe this differently.
++ * Functionally it works correctly, because all we need to do is to
++ * turn on the actual 3.3V supply above.
++ */
++ vreg_wcn_0p95: regulator-wcn-0p95 {
++ compatible = "regulator-fixed";
+
-+ vreg_l2d_0p9: ldo2 {
-+ regulator-name = "vreg_l2d_0p9";
-+ regulator-min-microvolt = <912000>;
-+ regulator-max-microvolt = <912000>;
-+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
-+ };
++ regulator-name = "VREG_WCN_0P95";
++ regulator-min-microvolt = <950000>;
++ regulator-max-microvolt = <950000>;
+
-+ vreg_l3d_1p8: ldo3 {
-+ regulator-name = "vreg_l3d_1p8";
-+ regulator-min-microvolt = <1800000>;
-+ regulator-max-microvolt = <1800000>;
-+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
-+ };
++ vin-supply = <&vreg_wcn_3p3>;
+ };
+
-+ regulators-3 {
-+ compatible = "qcom,pmc8380-rpmh-regulators";
-+ qcom,pmic-id = "e";
-+
-+ vdd-l2-supply = <&vreg_s1f_0p7>;
-+ vdd-l3-supply = <&vreg_s5j_1p2>;
-+
-+ vreg_l2e_0p8: ldo2 {
-+ regulator-name = "vreg_l2e_0p8";
-+ regulator-min-microvolt = <880000>;
-+ regulator-max-microvolt = <880000>;
-+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
-+ };
++ vreg_wcn_1p9: regulator-wcn-1p9 {
++ compatible = "regulator-fixed";
+
-+ vreg_l3e_1p2: ldo3 {
-+ regulator-name = "vreg_l3e_1p2";
-+ regulator-min-microvolt = <1200000>;
-+ regulator-max-microvolt = <1200000>;
-+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
-+ };
-+ };
++ regulator-name = "VREG_WCN_1P9";
++ regulator-min-microvolt = <1900000>;
++ regulator-max-microvolt = <1900000>;
+
-+ regulators-4 {
-+ compatible = "qcom,pmc8380-rpmh-regulators";
-+ qcom,pmic-id = "f";
-+
-+ vdd-l1-supply = <&vreg_s5j_1p2>;
-+ vdd-l2-supply = <&vreg_s5j_1p2>;
-+ vdd-l3-supply = <&vreg_s5j_1p2>;
-+ vdd-s1-supply = <&vph_pwr>;
-+
-+ vreg_s1f_0p7: smps1 {
-+ regulator-name = "vreg_s1f_0p7";
-+ regulator-min-microvolt = <700000>;
-+ regulator-max-microvolt = <1100000>;
-+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
-+ };
++ vin-supply = <&vreg_wcn_3p3>;
+ };
+
-+ regulators-6 {
-+ compatible = "qcom,pm8550ve-rpmh-regulators";
-+ qcom,pmic-id = "i";
-+
-+ vdd-l1-supply = <&vreg_s4c_1p8>;
-+ vdd-l2-supply = <&vreg_s5j_1p2>;
-+ vdd-l3-supply = <&vreg_s1f_0p7>;
-+ vdd-s1-supply = <&vph_pwr>;
-+ vdd-s2-supply = <&vph_pwr>;
-+
-+ vreg_l1i_1p8: ldo1 {
-+ regulator-name = "vreg_l1i_1p8";
-+ regulator-min-microvolt = <1800000>;
-+ regulator-max-microvolt = <1800000>;
-+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
-+ };
++ wcn7850-pmu {
++ compatible = "qcom,wcn7850-pmu";
+
-+ vreg_l2i_1p2: ldo2 {
-+ regulator-name = "vreg_l2i_1p2";
-+ regulator-min-microvolt = <1200000>;
-+ regulator-max-microvolt = <1200000>;
-+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
-+ };
++ vdd-supply = <&vreg_wcn_0p95>;
++ vddio-supply = <&vreg_l15b_1p8>;
++ vddaon-supply = <&vreg_wcn_0p95>;
++ vdddig-supply = <&vreg_wcn_0p95>;
++ vddrfa1p2-supply = <&vreg_wcn_1p9>;
++ vddrfa1p8-supply = <&vreg_wcn_1p9>;
+
-+ vreg_l3i_0p8: ldo3 {
-+ regulator-name = "vreg_l3i_0p8";
-+ regulator-min-microvolt = <880000>;
-+ regulator-max-microvolt = <880000>;
-+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
-+ };
-+ };
++ wlan-enable-gpios = <&tlmm 117 GPIO_ACTIVE_HIGH>;
++ bt-enable-gpios = <&tlmm 116 GPIO_ACTIVE_HIGH>;
+
-+ regulators-7 {
-+ compatible = "qcom,pm8550ve-rpmh-regulators";
-+ qcom,pmic-id = "j";
-+
-+ vdd-l1-supply = <&vreg_s1f_0p7>;
-+ vdd-l2-supply = <&vreg_s5j_1p2>;
-+ vdd-l3-supply = <&vreg_s1f_0p7>;
-+ vdd-s5-supply = <&vph_pwr>;
-+
-+ vreg_s5j_1p2: smps5 {
-+ regulator-name = "vreg_s5j_1p2";
-+ regulator-min-microvolt = <1256000>;
-+ regulator-max-microvolt = <1304000>;
-+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
-+ };
++ pinctrl-0 = <&wcn_wlan_bt_en>;
++ pinctrl-names = "default";
+
-+ vreg_l1j_0p8: ldo1 {
-+ regulator-name = "vreg_l1j_0p8";
-+ regulator-min-microvolt = <912000>;
-+ regulator-max-microvolt = <912000>;
-+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
-+ };
++ regulators {
++ vreg_pmu_rfa_cmn: ldo0 {
++ regulator-name = "vreg_pmu_rfa_cmn";
++ };
+
-+ vreg_l2j_1p2: ldo2 {
-+ regulator-name = "vreg_l2j_1p2";
-+ regulator-min-microvolt = <1256000>;
-+ regulator-max-microvolt = <1256000>;
-+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
-+ };
++ vreg_pmu_aon_0p59: ldo1 {
++ regulator-name = "vreg_pmu_aon_0p59";
++ };
+
-+ vreg_l3j_0p8: ldo3 {
-+ regulator-name = "vreg_l3j_0p8";
-+ regulator-min-microvolt = <880000>;
-+ regulator-max-microvolt = <880000>;
-+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
-+ };
-+ };
-+};
++ vreg_pmu_wlcx_0p8: ldo2 {
++ regulator-name = "vreg_pmu_wlcx_0p8";
++ };
+
-+&gpu {
-+ status = "okay";
++ vreg_pmu_wlmx_0p85: ldo3 {
++ regulator-name = "vreg_pmu_wlmx_0p85";
++ };
+
-+ zap-shader {
-+ firmware-name = "qcom/x1e80100/LENOVO/21N1/qcdxkmsuc8380.mbn";
-+ };
-+};
++ vreg_pmu_btcmx_0p85: ldo4 {
++ regulator-name = "vreg_pmu_btcmx_0p85";
++ };
++
++ vreg_pmu_rfa_0p8: ldo5 {
++ regulator-name = "vreg_pmu_rfa_0p8";
++ };
+
-+&i2c0 {
++ vreg_pmu_rfa_1p2: ldo6 {
++ regulator-name = "vreg_pmu_rfa_1p2";
++ };
++
++ vreg_pmu_rfa_1p8: ldo7 {
++ regulator-name = "vreg_pmu_rfa_1p8";
++ };
++
++ vreg_pmu_pcie_0p9: ldo8 {
++ regulator-name = "vreg_pmu_pcie_0p9";
++ };
++
++ vreg_pmu_pcie_1p8: ldo9 {
++ regulator-name = "vreg_pmu_pcie_1p8";
++ };
++ };
++ };
+ };
+
+ &apps_rsc {
+@@ -495,6 +712,169 @@
+ };
+ };
+
++&i2c3 {
+ clock-frequency = <400000>;
+
+ status = "okay";
+
-+ /* ELAN06E2 or ELAN06E3 */
-+ touchpad@15 {
-+ compatible = "hid-over-i2c";
-+ reg = <0x15>;
++ typec-mux@8 {
++ compatible = "parade,ps8830";
++ reg = <0x08>;
++
++ clocks = <&rpmhcc RPMH_RF_CLK3>;
++
++ vdd-supply = <&vreg_rtmr0_1p15>;
++ vdd33-supply = <&vreg_rtmr0_3p3>;
++ vdd33-cap-supply = <&vreg_rtmr0_3p3>;
++ vddar-supply = <&vreg_rtmr0_1p15>;
++ vddat-supply = <&vreg_rtmr0_1p15>;
++ vddio-supply = <&vreg_rtmr0_1p8>;
+
-+ hid-descr-addr = <0x1>;
-+ interrupts-extended = <&tlmm 3 IRQ_TYPE_LEVEL_LOW>;
++ reset-gpios = <&pm8550_gpios 10 GPIO_ACTIVE_LOW>;
+
-+ pinctrl-0 = <&tpad_default>;
++ pinctrl-0 = <&rtmr0_default>;
+ pinctrl-names = "default";
+
-+ wakeup-source;
-+ };
++ orientation-switch;
++ retimer-switch;
+
-+ /* TODO: second-sourced SYNA8022 or SYNA8024 touchpad @ 0x2c */
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
+
-+ /* ELAN06F1 or SYNA06F2 */
-+ keyboard@3a {
-+ compatible = "hid-over-i2c";
-+ reg = <0x3a>;
++ port@0 {
++ reg = <0>;
+
-+ hid-descr-addr = <0x1>;
-+ interrupts-extended = <&tlmm 67 IRQ_TYPE_LEVEL_LOW>;
++ retimer_ss0_ss_out: endpoint {
++ remote-endpoint = <&pmic_glink_ss0_ss_in>;
++ };
++ };
+
-+ pinctrl-0 = <&kybd_default>;
-+ pinctrl-names = "default";
++ port@1 {
++ reg = <1>;
++
++ retimer_ss0_ss_in: endpoint {
++ remote-endpoint = <&usb_1_ss0_qmpphy_out>;
++ };
++ };
+
-+ wakeup-source;
++ port@2 {
++ reg = <2>;
++
++ retimer_ss0_con_sbu_out: endpoint {
++ remote-endpoint = <&pmic_glink_ss0_con_sbu_in>;
++ };
++ };
++ };
+ };
+};
+
-+&i2c8 {
++&i2c5 {
+ clock-frequency = <400000>;
+
+ status = "okay";
+
-+ /* ILIT2911 or GTCH1563 */
-+ touchscreen@10 {
-+ compatible = "hid-over-i2c";
-+ reg = <0x10>;
++ eusb5_repeater: redriver@43 {
++ compatible = "nxp,ptn3222";
++ reg = <0x43>;
++ #phy-cells = <0>;
++
++ vdd3v3-supply = <&vreg_l13b_3p0>;
++ vdd1v8-supply = <&vreg_l4b_1p8>;
+
-+ hid-descr-addr = <0x1>;
-+ interrupts-extended = <&tlmm 51 IRQ_TYPE_LEVEL_LOW>;
++ reset-gpios = <&tlmm 7 GPIO_ACTIVE_LOW>;
+
-+ pinctrl-0 = <&ts0_default>;
++ pinctrl-0 = <&eusb5_reset_n>;
+ pinctrl-names = "default";
+ };
+
-+ /* TODO: second-sourced touchscreen @ 0x41 */
-+};
++ eusb3_repeater: redriver@47 {
++ compatible = "nxp,ptn3222";
++ reg = <0x47>;
++ #phy-cells = <0>;
+
-+&mdss {
-+ status = "okay";
-+};
++ vdd3v3-supply = <&vreg_l13b_3p0>;
++ vdd1v8-supply = <&vreg_l4b_1p8>;
+
-+&mdss_dp3 {
-+ compatible = "qcom,x1e80100-dp";
-+ /delete-property/ #sound-dai-cells;
++ reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>;
+
-+ status = "okay";
++ pinctrl-0 = <&eusb3_reset_n>;
++ pinctrl-names = "default";
++ };
+
-+ aux-bus {
-+ panel {
-+ compatible = "edp-panel";
-+ enable-gpios = <&pmc8380_3_gpios 4 GPIO_ACTIVE_HIGH>;
-+ power-supply = <&vreg_edp_3p3>;
++ eusb6_repeater: redriver@4f {
++ compatible = "nxp,ptn3222";
++ reg = <0x4f>;
++ #phy-cells = <0>;
+
-+ pinctrl-0 = <&edp_bl_en>;
-+ pinctrl-names = "default";
++ vdd3v3-supply = <&vreg_l13b_3p0>;
++ vdd1v8-supply = <&vreg_l4b_1p8>;
+
-+ port {
-+ edp_panel_in: endpoint {
-+ remote-endpoint = <&mdss_dp3_out>;
-+ };
-+ };
-+ };
-+ };
++ reset-gpios = <&tlmm 184 GPIO_ACTIVE_LOW>;
+
-+ ports {
-+ port@1 {
-+ reg = <1>;
-+
-+ mdss_dp3_out: endpoint {
-+ data-lanes = <0 1 2 3>;
-+ link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
-+
-+ remote-endpoint = <&edp_panel_in>;
-+ };
-+ };
++ pinctrl-0 = <&eusb6_reset_n>;
++ pinctrl-names = "default";
+ };
+};
+
-+&mdss_dp3_phy {
-+ vdda-phy-supply = <&vreg_l3j_0p8>;
-+ vdda-pll-supply = <&vreg_l2j_1p2>;
++&i2c7 {
++ clock-frequency = <400000>;
+
+ status = "okay";
-+};
+
-+&pcie4 {
-+ perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
-+ wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
++ typec-mux@8 {
++ compatible = "parade,ps8830";
++ reg = <0x8>;
++
++ clocks = <&rpmhcc RPMH_RF_CLK4>;
++
++ vdd-supply = <&vreg_rtmr1_1p15>;
++ vdd33-supply = <&vreg_rtmr1_3p3>;
++ vdd33-cap-supply = <&vreg_rtmr1_3p3>;
++ vddar-supply = <&vreg_rtmr1_1p15>;
++ vddat-supply = <&vreg_rtmr1_1p15>;
++ vddio-supply = <&vreg_rtmr1_1p8>;
+
-+ pinctrl-0 = <&pcie4_default>;
-+ pinctrl-names = "default";
++ reset-gpios = <&tlmm 176 GPIO_ACTIVE_LOW>;
+
-+ status = "okay";
-+};
++ pinctrl-0 = <&rtmr1_default>;
++ pinctrl-names = "default";
+
-+&pcie4_phy {
-+ vdda-phy-supply = <&vreg_l3i_0p8>;
-+ vdda-pll-supply = <&vreg_l3e_1p2>;
++ retimer-switch;
++ orientation-switch;
+
-+ status = "okay";
-+};
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
+
-+&pcie6a {
-+ perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
-+ wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
++ port@0 {
++ reg = <0>;
+
-+ vddpe-3v3-supply = <&vreg_nvme>;
++ retimer_ss1_ss_out: endpoint {
++ remote-endpoint = <&pmic_glink_ss1_ss_in>;
++ };
++ };
+
-+ pinctrl-0 = <&pcie6a_default>;
-+ pinctrl-names = "default";
++ port@1 {
++ reg = <1>;
+
-+ status = "okay";
-+};
++ retimer_ss1_ss_in: endpoint {
++ remote-endpoint = <&usb_1_ss1_qmpphy_out>;
++ };
++ };
+
-+&pcie6a_phy {
-+ vdda-phy-supply = <&vreg_l1d_0p8>;
-+ vdda-pll-supply = <&vreg_l2j_1p2>;
++ port@2 {
++ reg = <2>;
+
-+ status = "okay";
-+};
++ retimer_ss1_con_sbu_out: endpoint {
++ remote-endpoint = <&pmic_glink_ss1_con_sbu_in>;
++ };
++ };
+
-+&pmc8380_3_gpios {
-+ edp_bl_en: edp-bl-en-state {
-+ pins = "gpio4";
-+ function = "normal";
-+ power-source = <1>;
-+ input-disable;
-+ output-enable;
++ };
+ };
+};
+
-+&qupv3_0 {
+ &i2c8 {
+ clock-frequency = <400000>;
+
+@@ -519,6 +899,22 @@
+ status = "okay";
+ };
+
++&mdss_dp0 {
+ status = "okay";
+};
+
-+&qupv3_1 {
++&mdss_dp0_out {
++ data-lanes = <0 1>;
++};
++
++&mdss_dp1 {
+ status = "okay";
+};
+
-+&qupv3_2 {
-+ status = "okay";
-+};
-+
-+&remoteproc_adsp {
-+ firmware-name = "qcom/x1e80100/LENOVO/21N1/qcadsp8380.mbn",
-+ "qcom/x1e80100/LENOVO/21N1/adsp_dtbs.elf";
-+
-+ status = "okay";
++&mdss_dp1_out {
++ data-lanes = <0 1>;
++};
++
+ &mdss_dp3 {
+ compatible = "qcom,x1e80100-dp";
+ /delete-property/ #sound-dai-cells;
+@@ -580,6 +976,23 @@
+ status = "okay";
+ };
+
++&pcie4_port0 {
++ wifi@0 {
++ compatible = "pci17cb,1107";
++ reg = <0x10000 0x0 0x0 0x0 0x0>;
++
++ vddaon-supply = <&vreg_pmu_aon_0p59>;
++ vddwlcx-supply = <&vreg_pmu_wlcx_0p8>;
++ vddwlmx-supply = <&vreg_pmu_wlmx_0p85>;
++ vddrfacmn-supply = <&vreg_pmu_rfa_cmn>;
++ vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
++ vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
++ vddrfa1p8-supply = <&vreg_pmu_rfa_1p8>;
++ vddpcie0p9-supply = <&vreg_pmu_pcie_0p9>;
++ vddpcie1p8-supply = <&vreg_pmu_pcie_1p8>;
++ };
+};
+
-+&remoteproc_cdsp {
-+ firmware-name = "qcom/x1e80100/LENOVO/21N1/qccdsp8380.mbn",
-+ "qcom/x1e80100/LENOVO/21N1/cdsp_dtbs.elf";
+ &pcie6a {
+ perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
+ wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
+@@ -599,6 +1012,37 @@
+ status = "okay";
+ };
+
++&pm8550_gpios {
++ rtmr0_default: rtmr0-reset-n-active-state {
++ pins = "gpio10";
++ function = "normal";
++ power-source = <1>; /* 1.8V */
++ bias-disable;
++ input-disable;
++ output-enable;
++ };
+
-+ status = "okay";
++ usb0_3p3_reg_en: usb0-3p3-reg-en-state {
++ pins = "gpio11";
++ function = "normal";
++ power-source = <1>; /* 1.8V */
++ bias-disable;
++ input-disable;
++ output-enable;
++ };
+};
+
-+&smb2360_0_eusb2_repeater {
-+ vdd18-supply = <&vreg_l3d_1p8>;
-+ vdd3-supply = <&vreg_l2b_3p0>;
++&pm8550ve_9_gpios {
++ usb0_1p8_reg_en: usb0-1p8-reg-en-state {
++ pins = "gpio8";
++ function = "normal";
++ power-source = <1>; /* 1.8V */
++ bias-disable;
++ input-disable;
++ output-enable;
++ };
+};
+
-+&smb2360_1_eusb2_repeater {
-+ vdd18-supply = <&vreg_l3d_1p8>;
-+ vdd3-supply = <&vreg_l14b_3p0>;
+ &pmc8380_3_gpios {
+ edp_bl_en: edp-bl-en-state {
+ pins = "gpio4";
+@@ -609,6 +1053,17 @@
+ };
+ };
+
++&pmc8380_5_gpios {
++ usb0_pwr_1p15_reg_en: usb0-pwr-1p15-reg-en-state {
++ pins = "gpio8";
++ function = "normal";
++ power-source = <1>; /* 1.8V */
++ bias-disable;
++ input-disable;
++ output-enable;
++ };
+};
+
-+&tlmm {
-+ gpio-reserved-ranges = <34 2>, /* Unused */
-+ <44 4>, /* SPI (TPM) */
-+ <72 2>, /* Secure EC I2C connection (?) */
-+ <238 1>; /* UFS Reset */
-+
-+ tpad_default: tpad-default-state {
-+ pins = "gpio3";
+ &qupv3_0 {
+ status = "okay";
+ };
+@@ -651,6 +1106,30 @@
+ <72 2>, /* Secure EC I2C connection (?) */
+ <238 1>; /* UFS Reset */
+
++ eusb3_reset_n: eusb3-reset-n-state {
++ pins = "gpio6";
+ function = "gpio";
-+ bias-pull-up;
++ drive-strength = <2>;
++ bias-disable;
++ output-low;
+ };
+
-+ nvme_reg_en: nvme-reg-en-state {
-+ pins = "gpio18";
++ eusb5_reset_n: eusb5-reset-n-state {
++ pins = "gpio7";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-disable;
++ output-low;
+ };
+
-+ ts0_default: ts0-default-state {
-+ reset-n-pins {
-+ pins = "gpio48";
-+ function = "gpio";
-+ output-high;
-+ drive-strength = <16>;
-+ };
-+
-+ int-n-pins {
-+ pins = "gpio51";
-+ function = "gpio";
-+ bias-disable;
-+ };
-+ };
-+
-+ kybd_default: kybd-default-state {
-+ pins = "gpio67";
++ eusb6_reset_n: eusb6-reset-n-state {
++ pins = "gpio184";
+ function = "gpio";
++ drive-strength = <2>;
+ bias-disable;
++ output-low;
+ };
+
-+ edp_reg_en: edp-reg-en-state {
-+ pins = "gpio70";
+ tpad_default: tpad-default-state {
+ pins = "gpio3";
+ function = "gpio";
+@@ -744,6 +1223,34 @@
+ };
+ };
+
++ rtmr1_default: rtmr1-reset-n-active-state {
++ pins = "gpio176";
+ function = "gpio";
-+ drive-strength = <16>;
++ drive-strength = <2>;
+ bias-disable;
+ };
+
-+ hall_int_n_default: hall-int-n-state {
-+ pins = "gpio92";
++ usb1_pwr_1p15_reg_en: usb1-pwr-1p15-reg-en-state {
++ pins = "gpio188";
+ function = "gpio";
++ drive-strength = <2>;
+ bias-disable;
+ };
+
-+ pcie4_default: pcie4-default-state {
-+ clkreq-n-pins {
-+ pins = "gpio147";
-+ function = "pcie4_clk";
-+ drive-strength = <2>;
-+ bias-pull-up;
-+ };
-+
-+ perst-n-pins {
-+ pins = "gpio146";
-+ function = "gpio";
-+ drive-strength = <2>;
-+ bias-disable;
-+ };
-+
-+ wake-n-pins {
-+ pins = "gpio148";
-+ function = "gpio";
-+ drive-strength = <2>;
-+ bias-pull-up;
-+ };
-+ };
-+
-+ pcie6a_default: pcie6a-default-state {
-+ clkreq-n-pins {
-+ pins = "gpio153";
-+ function = "pcie6a_clk";
-+ drive-strength = <2>;
-+ bias-pull-up;
-+ };
-+
-+ perst-n-pins {
-+ pins = "gpio152";
-+ function = "gpio";
-+ drive-strength = <2>;
-+ bias-disable;
-+ };
-+
-+ wake-n-pins {
-+ pins = "gpio154";
-+ function = "gpio";
-+ drive-strength = <2>;
-+ bias-pull-up;
-+ };
++ usb1_pwr_1p8_reg_en: usb1-pwr-1p8-reg-en-state {
++ pins = "gpio175";
++ function = "gpio";
++ drive-strength = <2>;
++ bias-disable;
+ };
+
-+ wcd_default: wcd-reset-n-active-state {
-+ pins = "gpio191";
++ usb1_pwr_3p3_reg_en: usb1-pwr-3p3-reg-en-state {
++ pins = "gpio186";
+ function = "gpio";
-+ drive-strength = <16>;
++ drive-strength = <2>;
+ bias-disable;
-+ output-low;
+ };
-+};
-+
-+&usb_1_ss0_hsphy {
-+ vdd-supply = <&vreg_l3j_0p8>;
-+ vdda12-supply = <&vreg_l2j_1p2>;
+
-+ phys = <&smb2360_0_eusb2_repeater>;
-+
-+ status = "okay";
-+};
-+
-+&usb_1_ss0_qmpphy {
-+ vdda-phy-supply = <&vreg_l3e_1p2>;
-+ vdda-pll-supply = <&vreg_l1j_0p8>;
-+
-+ status = "okay";
+ wcd_default: wcd-reset-n-active-state {
+ pins = "gpio191";
+ function = "gpio";
+@@ -751,8 +1258,39 @@
+ bias-disable;
+ output-low;
+ };
++
++ wcn_sw_en: wcn-sw-en-state {
++ pins = "gpio214";
++ function = "gpio";
++ drive-strength = <2>;
++ bias-disable;
++ };
++
++ wcn_wlan_bt_en: wcn-wlan-bt-en-state {
++ pins = "gpio116", "gpio117";
++ function = "gpio";
++ drive-strength = <2>;
++ bias-disable;
++ };
+ };
+
++&uart14 {
++ status = "okay";
++
++ bluetooth {
++ compatible = "qcom,wcn7850-bt";
++ max-speed = <3200000>;
++
++ vddaon-supply = <&vreg_pmu_aon_0p59>;
++ vddwlcx-supply = <&vreg_pmu_wlcx_0p8>;
++ vddwlmx-supply = <&vreg_pmu_wlmx_0p85>;
++ vddrfacmn-supply = <&vreg_pmu_rfa_cmn>;
++ vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
++ vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
++ vddrfa1p8-supply = <&vreg_pmu_rfa_1p8>;
++ };
++};
++
+ &usb_1_ss0_hsphy {
+ vdd-supply = <&vreg_l3j_0p8>;
+ vdda12-supply = <&vreg_l2j_1p2>;
+@@ -763,7 +1301,7 @@
+ };
+
+ &usb_1_ss0_qmpphy {
+- vdda-phy-supply = <&vreg_l3e_1p2>;
++ vdda-phy-supply = <&vreg_l2j_1p2>;
+ vdda-pll-supply = <&vreg_l1j_0p8>;
+
+ status = "okay";
+@@ -782,7 +1320,7 @@
+ };
+
+ &usb_1_ss0_qmpphy_out {
+- remote-endpoint = <&pmic_glink_ss0_ss_in>;
++ remote-endpoint = <&retimer_ss0_ss_in>;
+ };
+
+ &usb_1_ss1_hsphy {
+@@ -795,7 +1333,7 @@
+ };
+
+ &usb_1_ss1_qmpphy {
+- vdda-phy-supply = <&vreg_l3e_1p2>;
++ vdda-phy-supply = <&vreg_l2j_1p2>;
+ vdda-pll-supply = <&vreg_l2d_0p9>;
+
+ status = "okay";
+@@ -814,5 +1352,58 @@
+ };
+
+ &usb_1_ss1_qmpphy_out {
+- remote-endpoint = <&pmic_glink_ss1_ss_in>;
++ remote-endpoint = <&retimer_ss1_ss_in>;
+};
+
-+&usb_1_ss0 {
++&usb_2 {
+ status = "okay";
+};
+
-+&usb_1_ss0_dwc3 {
++&usb_2_dwc3 {
+ dr_mode = "host";
+};
+
-+&usb_1_ss0_dwc3_hs {
-+ remote-endpoint = <&pmic_glink_ss0_hs_in>;
++&usb_2_hsphy {
++ vdd-supply = <&vreg_l2e_0p8>;
++ vdda12-supply = <&vreg_l3e_1p2>;
++
++ phys = <&eusb5_repeater>;
++
++ status = "okay";
+};
+
-+&usb_1_ss0_qmpphy_out {
-+ remote-endpoint = <&pmic_glink_ss0_ss_in>;
++&usb_mp {
++ status = "okay";
+};
+
-+&usb_1_ss1_hsphy {
-+ vdd-supply = <&vreg_l3j_0p8>;
-+ vdda12-supply = <&vreg_l2j_1p2>;
++&usb_mp_hsphy0 {
++ vdd-supply = <&vreg_l2e_0p8>;
++ vdda12-supply = <&vreg_l3e_1p2>;
+
-+ phys = <&smb2360_1_eusb2_repeater>;
++ phys = <&eusb6_repeater>;
+
+ status = "okay";
+};
+
-+&usb_1_ss1_qmpphy {
++&usb_mp_qmpphy0 {
+ vdda-phy-supply = <&vreg_l3e_1p2>;
-+ vdda-pll-supply = <&vreg_l2d_0p9>;
++ vdda-pll-supply = <&vreg_l3c_0p8>;
+
+ status = "okay";
+};
+
-+&usb_1_ss1 {
-+ status = "okay";
-+};
++&usb_mp_hsphy1 {
++ vdd-supply = <&vreg_l2e_0p8>;
++ vdda12-supply = <&vreg_l3e_1p2>;
+
-+&usb_1_ss1_dwc3 {
-+ dr_mode = "host";
-+};
++ phys = <&eusb3_repeater>;
+
-+&usb_1_ss1_dwc3_hs {
-+ remote-endpoint = <&pmic_glink_ss1_hs_in>;
++ status = "okay";
+};
+
-+&usb_1_ss1_qmpphy_out {
-+ remote-endpoint = <&pmic_glink_ss1_ss_in>;
-+};
++&usb_mp_qmpphy1 {
++ vdda-phy-supply = <&vreg_l3e_1p2>;
++ vdda-pll-supply = <&vreg_l3c_0p8>;
+
-+&usb_mp {
+ status = "okay";
-+};
+ };
Index: sysutils/firmware/arm64-qcom-dtb/patches/patch-src_arm64_qcom_x1e80100-asus-vivobook-s15_dts
===================================================================
RCS file: /cvs/ports/sysutils/firmware/arm64-qcom-dtb/patches/patch-src_arm64_qcom_x1e80100-asus-vivobook-s15_dts,v
diff -u -p -r1.2 patch-src_arm64_qcom_x1e80100-asus-vivobook-s15_dts
--- sysutils/firmware/arm64-qcom-dtb/patches/patch-src_arm64_qcom_x1e80100-asus-vivobook-s15_dts 21 Sep 2024 17:14:17 -0000 1.2
+++ sysutils/firmware/arm64-qcom-dtb/patches/patch-src_arm64_qcom_x1e80100-asus-vivobook-s15_dts 25 Jan 2025 12:51:42 -0000
@@ -1,23 +1,472 @@
Index: src/arm64/qcom/x1e80100-asus-vivobook-s15.dts
--- src/arm64/qcom/x1e80100-asus-vivobook-s15.dts.orig
+++ src/arm64/qcom/x1e80100-asus-vivobook-s15.dts
-@@ -501,10 +501,6 @@
- vdd3-supply = <&vreg_l14b_3p0>;
+@@ -7,7 +7,9 @@
+ /dts-v1/;
+
+ #include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/input/gpio-keys.h>
+ #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
++#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
+
+ #include "x1e80100.dtsi"
+ #include "x1e80100-pmics.dtsi"
+@@ -17,6 +19,24 @@
+ compatible = "asus,vivobook-s15", "qcom,x1e80100";
+ chassis-type = "laptop";
+
++ aliases {
++ serial1 = &uart14;
++ };
++
++ gpio-keys {
++ compatible = "gpio-keys";
++ pinctrl-0 = <&hall_int_n_default>;
++ pinctrl-names = "default";
++
++ switch-lid {
++ gpios = <&tlmm 92 GPIO_ACTIVE_LOW>;
++ linux,input-type = <EV_SW>;
++ linux,code = <SW_LID>;
++ wakeup-source;
++ wakeup-event-action = <EV_ACT_DEASSERTED>;
++ };
++ };
++
+ pmic-glink {
+ compatible = "qcom,x1e80100-pmic-glink",
+ "qcom,sm8550-pmic-glink",
+@@ -137,6 +157,101 @@
+ regulator-always-on;
+ regulator-boot-on;
+ };
++
++ vreg_wcn_0p95: regulator-wcn-0p95 {
++ compatible = "regulator-fixed";
++
++ regulator-name = "VREG_WCN_0P95";
++ regulator-min-microvolt = <950000>;
++ regulator-max-microvolt = <950000>;
++
++ vin-supply = <&vreg_wcn_3p3>;
++ };
++
++ vreg_wcn_1p9: regulator-wcn-1p9 {
++ compatible = "regulator-fixed";
++
++ regulator-name = "VREG_WCN_1P9";
++ regulator-min-microvolt = <1900000>;
++ regulator-max-microvolt = <1900000>;
++
++ vin-supply = <&vreg_wcn_3p3>;
++ };
++
++ vreg_wcn_3p3: regulator-wcn-3p3 {
++ compatible = "regulator-fixed";
++
++ regulator-name = "VREG_WCN_3P3";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++
++ gpio = <&tlmm 214 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
++
++ pinctrl-0 = <&wcn_sw_en>;
++ pinctrl-names = "default";
++
++ regulator-boot-on;
++ };
++
++ wcn7850-pmu {
++ compatible = "qcom,wcn7850-pmu";
++
++ vdd-supply = <&vreg_wcn_0p95>;
++ vddio-supply = <&vreg_l15b_1p8>;
++ vddaon-supply = <&vreg_wcn_0p95>;
++ vdddig-supply = <&vreg_wcn_0p95>;
++ vddrfa1p2-supply = <&vreg_wcn_1p9>;
++ vddrfa1p8-supply = <&vreg_wcn_1p9>;
++
++ wlan-enable-gpios = <&tlmm 117 GPIO_ACTIVE_HIGH>;
++ bt-enable-gpios = <&tlmm 116 GPIO_ACTIVE_HIGH>;
++
++ pinctrl-0 = <&wcn_wlan_en>, <&wcn_bt_en>;
++ pinctrl-names = "default";
++
++ regulators {
++ vreg_pmu_rfa_cmn: ldo0 {
++ regulator-name = "vreg_pmu_rfa_cmn";
++ };
++
++ vreg_pmu_aon_0p59: ldo1 {
++ regulator-name = "vreg_pmu_aon_0p59";
++ };
++
++ vreg_pmu_wlcx_0p8: ldo2 {
++ regulator-name = "vreg_pmu_wlcx_0p8";
++ };
++
++ vreg_pmu_wlmx_0p85: ldo3 {
++ regulator-name = "vreg_pmu_wlmx_0p85";
++ };
++
++ vreg_pmu_btcmx_0p85: ldo4 {
++ regulator-name = "vreg_pmu_btcmx_0p85";
++ };
++
++ vreg_pmu_rfa_0p8: ldo5 {
++ regulator-name = "vreg_pmu_rfa_0p8";
++ };
++
++ vreg_pmu_rfa_1p2: ldo6 {
++ regulator-name = "vreg_pmu_rfa_1p2";
++ };
++
++ vreg_pmu_rfa_1p8: ldo7 {
++ regulator-name = "vreg_pmu_rfa_1p8";
++ };
++
++ vreg_pmu_pcie_0p9: ldo8 {
++ regulator-name = "vreg_pmu_pcie_0p9";
++ };
++
++ vreg_pmu_pcie_1p8: ldo9 {
++ regulator-name = "vreg_pmu_pcie_1p8";
++ };
++ };
++ };
+ };
+
+ &apps_rsc {
+@@ -176,12 +291,33 @@
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
++ vreg_l4b_1p8: ldo4 {
++ regulator-name = "vreg_l4b_1p8";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ };
++
++ vreg_l13b_3p0: ldo13 {
++ regulator-name = "vreg_l13b_3p0";
++ regulator-min-microvolt = <3072000>;
++ regulator-max-microvolt = <3072000>;
++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ };
++
+ vreg_l14b_3p0: ldo14 {
+ regulator-name = "vreg_l14b_3p0";
+ regulator-min-microvolt = <3072000>;
+ regulator-max-microvolt = <3072000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
++
++ vreg_l15b_1p8: ldo15 {
++ regulator-name = "vreg_l15b_1p8";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ };
+ };
+
+ regulators-1 {
+@@ -193,6 +329,13 @@
+ vdd-l3-supply = <&vreg_s1f_0p7>;
+ vdd-s4-supply = <&vph_pwr>;
+
++ vreg_l3c_0p8: ldo3 {
++ regulator-name = "vreg_l3c_0p8";
++ regulator-min-microvolt = <912000>;
++ regulator-max-microvolt = <912000>;
++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ };
++
+ vreg_s4c_1p8: smps4 {
+ regulator-name = "vreg_s4c_1p8";
+ regulator-min-microvolt = <1856000>;
+@@ -328,6 +471,14 @@
+ };
};

--&smb2360_2 {
-- status = "disabled";
--};
--
- &tlmm {
- gpio-reserved-ranges = <34 2>, /* Unused */
- <44 4>, /* SPI (TPM) */
-@@ -649,4 +645,8 @@
++&gpu {
++ status = "okay";
++
++ zap-shader {
++ firmware-name = "qcom/x1e80100/ASUSTeK/vivobook-s15/qcdxkmsuc8380.mbn";
++ };
++};
++
+ &i2c0 {
+ clock-frequency = <400000>;
+ status = "okay";
+@@ -377,7 +528,49 @@
+ wakeup-source;
+ };
+
+- /* EC? @ 0x5b, 0x76 */
++ eusb5_repeater: redriver@43 {
++ compatible = "nxp,ptn3222";
++ reg = <0x43>;
++ #phy-cells = <0>;
++
++ vdd3v3-supply = <&vreg_l13b_3p0>;
++ vdd1v8-supply = <&vreg_l4b_1p8>;
++
++ reset-gpios = <&tlmm 7 GPIO_ACTIVE_LOW>;
++
++ pinctrl-0 = <&eusb5_reset_n>;
++ pinctrl-names = "default";
++ };
++
++ eusb3_repeater: redriver@47 {
++ compatible = "nxp,ptn3222";
++ reg = <0x47>;
++ #phy-cells = <0>;
++
++ vdd3v3-supply = <&vreg_l13b_3p0>;
++ vdd1v8-supply = <&vreg_l4b_1p8>;
++
++ reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>;
++
++ pinctrl-0 = <&eusb3_reset_n>;
++ pinctrl-names = "default";
++ };
++
++ eusb6_repeater: redriver@4f {
++ compatible = "nxp,ptn3222";
++ reg = <0x4f>;
++ #phy-cells = <0>;
++
++ vdd3v3-supply = <&vreg_l13b_3p0>;
++ vdd1v8-supply = <&vreg_l4b_1p8>;
++
++ reset-gpios = <&tlmm 184 GPIO_ACTIVE_LOW>;
++
++ pinctrl-0 = <&eusb6_reset_n>;
++ pinctrl-names = "default";
++ };
++
++ /* EC @ 0x76 */
+ };
+
+ &i2c7 {
+@@ -399,9 +592,13 @@
+
+ aux-bus {
+ panel {
+- compatible = "edp-panel";
++ compatible = "samsung,atna56ac03", "samsung,atna33xc20";
++ enable-gpios = <&pmc8380_3_gpios 4 GPIO_ACTIVE_HIGH>;
+ power-supply = <&vreg_edp_3p3>;
+
++ pinctrl-0 = <&edp_bl_en>;
++ pinctrl-names = "default";
++
+ port {
+ edp_panel_in: endpoint {
+ remote-endpoint = <&mdss_dp3_out>;
+@@ -448,6 +645,23 @@
+ status = "okay";
+ };
+
++&pcie4_port0 {
++ wifi@0 {
++ compatible = "pci17cb,1107";
++ reg = <0x10000 0x0 0x0 0x0 0x0>;
++
++ vddaon-supply = <&vreg_pmu_aon_0p59>;
++ vddwlcx-supply = <&vreg_pmu_wlcx_0p8>;
++ vddwlmx-supply = <&vreg_pmu_wlmx_0p85>;
++ vddrfacmn-supply = <&vreg_pmu_rfa_cmn>;
++ vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
++ vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
++ vddrfa1p8-supply = <&vreg_pmu_rfa_1p8>;
++ vddpcie0p9-supply = <&vreg_pmu_pcie_0p9>;
++ vddpcie1p8-supply = <&vreg_pmu_pcie_1p8>;
++ };
++};
++
+ &pcie6a {
+ perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
+ wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
+@@ -467,6 +681,18 @@
+ status = "okay";
+ };
+
++&pmc8380_3_gpios {
++ edp_bl_en: edp-bl-en-state {
++ pins = "gpio4";
++ function = "normal";
++ power-source = <1>; /* 1.8 V */
++ qcom,drive-strength = <PMIC_GPIO_STRENGTH_MED>;
++ bias-pull-down;
++ input-disable;
++ output-enable;
++ };
++};
++
+ &qupv3_0 {
+ status = "okay";
+ };
+@@ -515,6 +741,36 @@
+ bias-disable;
+ };
+
++ eusb3_reset_n: eusb3-reset-n-state {
++ pins = "gpio6";
++ function = "gpio";
++ drive-strength = <2>;
++ bias-pull-up;
++ output-low;
++ };
++
++ eusb5_reset_n: eusb5-reset-n-state {
++ pins = "gpio7";
++ function = "gpio";
++ drive-strength = <2>;
++ bias-pull-up;
++ output-low;
++ };
++
++ eusb6_reset_n: eusb6-reset-n-state {
++ pins = "gpio184";
++ function = "gpio";
++ drive-strength = <2>;
++ bias-pull-up;
++ output-low;
++ };
++
++ hall_int_n_default: hall-int-n-state {
++ pins = "gpio92";
++ function = "gpio";
++ bias-disable;
++ };
++
+ kybd_default: kybd-default-state {
+ pins = "gpio67";
+ function = "gpio";
+@@ -579,8 +835,46 @@
+ function = "gpio";
+ bias-disable;
+ };
++
++ wcn_bt_en: wcn-bt-en-state {
++ pins = "gpio116";
++ function = "gpio";
++ drive-strength = <16>;
++ bias-pull-down;
++ };
++
++ wcn_sw_en: wcn-sw-en-state {
++ pins = "gpio214";
++ function = "gpio";
++ drive-strength = <16>;
++ bias-disable;
++ };
++
++ wcn_wlan_en: wcn-wlan-en-state {
++ pins = "gpio117";
++ function = "gpio";
++ drive-strength = <16>;
++ bias-disable;
++ };
+ };
+
++&uart14 {
++ status = "okay";
++
++ bluetooth {
++ compatible = "qcom,wcn7850-bt";
++ max-speed = <3200000>;
++
++ vddaon-supply = <&vreg_pmu_aon_0p59>;
++ vddwlcx-supply = <&vreg_pmu_wlcx_0p8>;
++ vddwlmx-supply = <&vreg_pmu_wlmx_0p85>;
++ vddrfacmn-supply = <&vreg_pmu_rfa_cmn>;
++ vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
++ vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
++ vddrfa1p8-supply = <&vreg_pmu_rfa_1p8>;
++ };
++};
++
+ &usb_1_ss0_hsphy {
+ vdd-supply = <&vreg_l3j_0p8>;
+ vdda12-supply = <&vreg_l2j_1p2>;
+@@ -591,7 +885,7 @@
+ };
+
+ &usb_1_ss0_qmpphy {
+- vdda-phy-supply = <&vreg_l3e_1p2>;
++ vdda-phy-supply = <&vreg_l2j_1p2>;
+ vdda-pll-supply = <&vreg_l1j_0p8>;
+
+ status = "okay";
+@@ -623,7 +917,7 @@
+ };
+
+ &usb_1_ss1_qmpphy {
+- vdda-phy-supply = <&vreg_l3e_1p2>;
++ vdda-phy-supply = <&vreg_l2j_1p2>;
+ vdda-pll-supply = <&vreg_l2d_0p9>;
+
+ status = "okay";
+@@ -643,4 +937,57 @@

&usb_1_ss1_qmpphy_out {
remote-endpoint = <&pmic_glink_ss1_ss_in>;
+};
+
++&usb_2 {
++ status = "okay";
++};
++
++&usb_2_dwc3 {
++ dr_mode = "host";
++};
++
++&usb_2_hsphy {
++ vdd-supply = <&vreg_l2e_0p8>;
++ vdda12-supply = <&vreg_l3e_1p2>;
++
++ phys = <&eusb5_repeater>;
++
++ status = "okay";
++};
++
+&usb_mp {
++ status = "okay";
++};
++
++&usb_mp_hsphy0 {
++ vdd-supply = <&vreg_l2e_0p8>;
++ vdda12-supply = <&vreg_l3e_1p2>;
++
++ phys = <&eusb6_repeater>;
++
++ status = "okay";
++};
++
++&usb_mp_hsphy1 {
++ vdd-supply = <&vreg_l2e_0p8>;
++ vdda12-supply = <&vreg_l3e_1p2>;
++
++ phys = <&eusb3_repeater>;
++
++ status = "okay";
++};
++
++&usb_mp_qmpphy0 {
++ vdda-phy-supply = <&vreg_l3e_1p2>;
++ vdda-pll-supply = <&vreg_l3c_0p8>;
++
++ status = "okay";
++};
++
++&usb_mp_qmpphy1 {
++ vdda-phy-supply = <&vreg_l3e_1p2>;
++ vdda-pll-supply = <&vreg_l3c_0p8>;
++
+ status = "okay";
};
Index: sysutils/firmware/arm64-qcom-dtb/patches/patch-src_arm64_qcom_x1e80100-crd_dts
===================================================================
RCS file: sysutils/firmware/arm64-qcom-dtb/patches/patch-src_arm64_qcom_x1e80100-crd_dts
diff -N sysutils/firmware/arm64-qcom-dtb/patches/patch-src_arm64_qcom_x1e80100-crd_dts
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ sysutils/firmware/arm64-qcom-dtb/patches/patch-src_arm64_qcom_x1e80100-crd_dts 25 Jan 2025 12:51:42 -0000
@@ -0,0 +1,798 @@
+Index: src/arm64/qcom/x1e80100-crd.dts
+--- src/arm64/qcom/x1e80100-crd.dts.orig
++++ src/arm64/qcom/x1e80100-crd.dts
+@@ -20,6 +20,7 @@
+
+ aliases {
+ serial0 = &uart21;
++ serial1 = &uart14;
+ };
+
+ wcd938x: audio-codec {
+@@ -100,9 +101,17 @@
+ reg = <1>;
+
+ pmic_glink_ss0_ss_in: endpoint {
+- remote-endpoint = <&usb_1_ss0_qmpphy_out>;
++ remote-endpoint = <&retimer_ss0_ss_out>;
+ };
+ };
++
++ port@2 {
++ reg = <2>;
++
++ pmic_glink_ss0_con_sbu_in: endpoint {
++ remote-endpoint = <&retimer_ss0_con_sbu_out>;
++ };
++ };
+ };
+ };
+
+@@ -129,9 +138,17 @@
+ reg = <1>;
+
+ pmic_glink_ss1_ss_in: endpoint {
+- remote-endpoint = <&usb_1_ss1_qmpphy_out>;
++ remote-endpoint = <&retimer_ss1_ss_out>;
+ };
+ };
++
++ port@2 {
++ reg = <2>;
++
++ pmic_glink_ss1_con_sbu_in: endpoint {
++ remote-endpoint = <&retimer_ss1_con_sbu_out>;
++ };
++ };
+ };
+ };
+
+@@ -158,9 +175,17 @@
+ reg = <1>;
+
+ pmic_glink_ss2_ss_in: endpoint {
+- remote-endpoint = <&usb_1_ss2_qmpphy_out>;
++ remote-endpoint = <&retimer_ss2_ss_out>;
+ };
+ };
++
++ port@2 {
++ reg = <2>;
++
++ pmic_glink_ss2_con_sbu_in: endpoint {
++ remote-endpoint = <&retimer_ss2_con_sbu_out>;
++ };
++ };
+ };
+ };
+ };
+@@ -311,6 +336,150 @@
+ regulator-boot-on;
+ };
+
++ vreg_rtmr0_1p15: regulator-rtmr0-1p15 {
++ compatible = "regulator-fixed";
++
++ regulator-name = "VREG_RTMR0_1P15";
++ regulator-min-microvolt = <1150000>;
++ regulator-max-microvolt = <1150000>;
++
++ gpio = <&pmc8380_5_gpios 8 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
++
++ pinctrl-0 = <&usb0_pwr_1p15_reg_en>;
++ pinctrl-names = "default";
++
++ regulator-boot-on;
++ };
++
++ vreg_rtmr0_1p8: regulator-rtmr0-1p8 {
++ compatible = "regulator-fixed";
++
++ regulator-name = "VREG_RTMR0_1P8";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++
++ gpio = <&pm8550ve_9_gpios 8 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
++
++ pinctrl-0 = <&usb0_1p8_reg_en>;
++ pinctrl-names = "default";
++
++ regulator-boot-on;
++ };
++
++ vreg_rtmr0_3p3: regulator-rtmr0-3p3 {
++ compatible = "regulator-fixed";
++
++ regulator-name = "VREG_RTMR0_3P3";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++
++ gpio = <&pm8550_gpios 11 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
++
++ pinctrl-0 = <&usb0_3p3_reg_en>;
++ pinctrl-names = "default";
++
++ regulator-boot-on;
++ };
++
++ vreg_rtmr1_1p15: regulator-rtmr1-1p15 {
++ compatible = "regulator-fixed";
++
++ regulator-name = "VREG_RTMR1_1P15";
++ regulator-min-microvolt = <1150000>;
++ regulator-max-microvolt = <1150000>;
++
++ gpio = <&tlmm 188 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
++
++ pinctrl-0 = <&usb1_pwr_1p15_reg_en>;
++ pinctrl-names = "default";
++
++ regulator-boot-on;
++ };
++
++ vreg_rtmr1_1p8: regulator-rtmr1-1p8 {
++ compatible = "regulator-fixed";
++
++ regulator-name = "VREG_RTMR1_1P8";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++
++ gpio = <&tlmm 175 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
++
++ pinctrl-0 = <&usb1_pwr_1p8_reg_en>;
++ pinctrl-names = "default";
++
++ regulator-boot-on;
++ };
++
++ vreg_rtmr1_3p3: regulator-rtmr1-3p3 {
++ compatible = "regulator-fixed";
++
++ regulator-name = "VREG_RTMR1_3P3";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++
++ gpio = <&tlmm 186 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
++
++ pinctrl-0 = <&usb1_pwr_3p3_reg_en>;
++ pinctrl-names = "default";
++
++ regulator-boot-on;
++ };
++
++ vreg_rtmr2_1p15: regulator-rtmr2-1p15 {
++ compatible = "regulator-fixed";
++
++ regulator-name = "VREG_RTMR2_1P15";
++ regulator-min-microvolt = <1150000>;
++ regulator-max-microvolt = <1150000>;
++
++ gpio = <&tlmm 189 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
++
++ pinctrl-0 = <&usb2_pwr_1p15_reg_en>;
++ pinctrl-names = "default";
++
++ regulator-boot-on;
++ };
++
++ vreg_rtmr2_1p8: regulator-rtmr2-1p8 {
++ compatible = "regulator-fixed";
++
++ regulator-name = "VREG_RTMR2_1P8";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++
++ gpio = <&tlmm 126 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
++
++ pinctrl-0 = <&usb2_pwr_1p8_reg_en>;
++ pinctrl-names = "default";
++
++ regulator-boot-on;
++ };
++
++ vreg_rtmr2_3p3: regulator-rtmr2-3p3 {
++ compatible = "regulator-fixed";
++
++ regulator-name = "VREG_RTMR2_3P3";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++
++ gpio = <&tlmm 187 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
++
++ pinctrl-0 = <&usb2_pwr_3p3_reg_en>;
++ pinctrl-names = "default";
++
++ regulator-boot-on;
++ };
++
+ vph_pwr: regulator-vph-pwr {
+ compatible = "regulator-fixed";
+
+@@ -322,6 +491,48 @@
+ regulator-boot-on;
+ };
+
++ vreg_wcn_3p3: regulator-wcn-3p3 {
++ compatible = "regulator-fixed";
++
++ regulator-name = "VREG_WCN_3P3";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++
++ gpio = <&tlmm 214 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
++
++ pinctrl-0 = <&wcn_sw_en>;
++ pinctrl-names = "default";
++
++ regulator-boot-on;
++ };
++
++ /*
++ * TODO: These two regulators are actually part of the removable M.2
++ * card and not the CRD mainboard. Need to describe this differently.
++ * Functionally it works correctly, because all we need to do is to
++ * turn on the actual 3.3V supply above.
++ */
++ vreg_wcn_0p95: regulator-wcn-0p95 {
++ compatible = "regulator-fixed";
++
++ regulator-name = "VREG_WCN_0P95";
++ regulator-min-microvolt = <950000>;
++ regulator-max-microvolt = <950000>;
++
++ vin-supply = <&vreg_wcn_3p3>;
++ };
++
++ vreg_wcn_1p9: regulator-wcn-1p9 {
++ compatible = "regulator-fixed";
++
++ regulator-name = "VREG_WCN_1P9";
++ regulator-min-microvolt = <1900000>;
++ regulator-max-microvolt = <1900000>;
++
++ vin-supply = <&vreg_wcn_3p3>;
++ };
++
+ vreg_wwan: regulator-wwan {
+ compatible = "regulator-fixed";
+
+@@ -337,6 +548,65 @@
+
+ regulator-boot-on;
+ };
++
++ wcn7850-pmu {
++ compatible = "qcom,wcn7850-pmu";
++
++ vdd-supply = <&vreg_wcn_0p95>;
++ vddio-supply = <&vreg_l15b_1p8>;
++ vddaon-supply = <&vreg_wcn_0p95>;
++ vdddig-supply = <&vreg_wcn_0p95>;
++ vddrfa1p2-supply = <&vreg_wcn_1p9>;
++ vddrfa1p8-supply = <&vreg_wcn_1p9>;
++
++ wlan-enable-gpios = <&tlmm 117 GPIO_ACTIVE_HIGH>;
++ bt-enable-gpios = <&tlmm 116 GPIO_ACTIVE_HIGH>;
++
++ pinctrl-0 = <&wcn_wlan_bt_en>;
++ pinctrl-names = "default";
++
++ regulators {
++ vreg_pmu_rfa_cmn: ldo0 {
++ regulator-name = "vreg_pmu_rfa_cmn";
++ };
++
++ vreg_pmu_aon_0p59: ldo1 {
++ regulator-name = "vreg_pmu_aon_0p59";
++ };
++
++ vreg_pmu_wlcx_0p8: ldo2 {
++ regulator-name = "vreg_pmu_wlcx_0p8";
++ };
++
++ vreg_pmu_wlmx_0p85: ldo3 {
++ regulator-name = "vreg_pmu_wlmx_0p85";
++ };
++
++ vreg_pmu_btcmx_0p85: ldo4 {
++ regulator-name = "vreg_pmu_btcmx_0p85";
++ };
++
++ vreg_pmu_rfa_0p8: ldo5 {
++ regulator-name = "vreg_pmu_rfa_0p8";
++ };
++
++ vreg_pmu_rfa_1p2: ldo6 {
++ regulator-name = "vreg_pmu_rfa_1p2";
++ };
++
++ vreg_pmu_rfa_1p8: ldo7 {
++ regulator-name = "vreg_pmu_rfa_1p8";
++ };
++
++ vreg_pmu_pcie_0p9: ldo8 {
++ regulator-name = "vreg_pmu_pcie_0p9";
++ };
++
++ vreg_pmu_pcie_1p8: ldo9 {
++ regulator-name = "vreg_pmu_pcie_1p8";
++ };
++ };
++ };
+ };
+
+ &apps_rsc {
+@@ -735,6 +1005,178 @@
+ };
+ };
+
++&i2c1 {
++ clock-frequency = <400000>;
++
++ status = "okay";
++
++ typec-mux@8 {
++ compatible = "parade,ps8830";
++ reg = <0x08>;
++
++ clocks = <&rpmhcc RPMH_RF_CLK5>;
++
++ vdd-supply = <&vreg_rtmr2_1p15>;
++ vdd33-supply = <&vreg_rtmr2_3p3>;
++ vdd33-cap-supply = <&vreg_rtmr2_3p3>;
++ vddar-supply = <&vreg_rtmr2_1p15>;
++ vddat-supply = <&vreg_rtmr2_1p15>;
++ vddio-supply = <&vreg_rtmr2_1p8>;
++
++ reset-gpios = <&tlmm 185 GPIO_ACTIVE_LOW>;
++
++ pinctrl-0 = <&rtmr2_default>;
++ pinctrl-names = "default";
++
++ orientation-switch;
++ retimer-switch;
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ reg = <0>;
++
++ retimer_ss2_ss_out: endpoint {
++ remote-endpoint = <&pmic_glink_ss2_ss_in>;
++ };
++ };
++
++ port@1 {
++ reg = <1>;
++
++ retimer_ss2_ss_in: endpoint {
++ remote-endpoint = <&usb_1_ss2_qmpphy_out>;
++ };
++ };
++
++ port@2 {
++ reg = <2>;
++
++ retimer_ss2_con_sbu_out: endpoint {
++ remote-endpoint = <&pmic_glink_ss2_con_sbu_in>;
++ };
++ };
++ };
++ };
++};
++
++&i2c3 {
++ clock-frequency = <400000>;
++
++ status = "okay";
++
++ typec-mux@8 {
++ compatible = "parade,ps8830";
++ reg = <0x08>;
++
++ clocks = <&rpmhcc RPMH_RF_CLK3>;
++
++ vdd-supply = <&vreg_rtmr0_1p15>;
++ vdd33-supply = <&vreg_rtmr0_3p3>;
++ vdd33-cap-supply = <&vreg_rtmr0_3p3>;
++ vddar-supply = <&vreg_rtmr0_1p15>;
++ vddat-supply = <&vreg_rtmr0_1p15>;
++ vddio-supply = <&vreg_rtmr0_1p8>;
++
++ reset-gpios = <&pm8550_gpios 10 GPIO_ACTIVE_LOW>;
++
++ pinctrl-0 = <&rtmr0_default>;
++ pinctrl-names = "default";
++
++ retimer-switch;
++ orientation-switch;
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ reg = <0>;
++
++ retimer_ss0_ss_out: endpoint {
++ remote-endpoint = <&pmic_glink_ss0_ss_in>;
++ };
++ };
++
++ port@1 {
++ reg = <1>;
++
++ retimer_ss0_ss_in: endpoint {
++ remote-endpoint = <&usb_1_ss0_qmpphy_out>;
++ };
++ };
++
++ port@2 {
++ reg = <2>;
++
++ retimer_ss0_con_sbu_out: endpoint {
++ remote-endpoint = <&pmic_glink_ss0_con_sbu_in>;
++ };
++ };
++ };
++ };
++};
++
++&i2c7 {
++ clock-frequency = <400000>;
++
++ status = "okay";
++
++ typec-mux@8 {
++ compatible = "parade,ps8830";
++ reg = <0x8>;
++
++ clocks = <&rpmhcc RPMH_RF_CLK4>;
++
++ vdd-supply = <&vreg_rtmr1_1p15>;
++ vdd33-supply = <&vreg_rtmr1_3p3>;
++ vdd33-cap-supply = <&vreg_rtmr1_3p3>;
++ vddar-supply = <&vreg_rtmr1_1p15>;
++ vddat-supply = <&vreg_rtmr1_1p15>;
++ vddio-supply = <&vreg_rtmr1_1p8>;
++
++ reset-gpios = <&tlmm 176 GPIO_ACTIVE_LOW>;
++
++ pinctrl-0 = <&rtmr1_default>;
++ pinctrl-names = "default";
++
++ retimer-switch;
++ orientation-switch;
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ reg = <0>;
++
++ retimer_ss1_ss_out: endpoint {
++ remote-endpoint = <&pmic_glink_ss1_ss_in>;
++ };
++ };
++
++ port@1 {
++ reg = <1>;
++
++ retimer_ss1_ss_in: endpoint {
++ remote-endpoint = <&usb_1_ss1_qmpphy_out>;
++ };
++ };
++
++ port@2 {
++ reg = <2>;
++
++ retimer_ss1_con_sbu_out: endpoint {
++ remote-endpoint = <&pmic_glink_ss1_con_sbu_in>;
++ };
++ };
++
++ };
++ };
++};
++
+ &i2c8 {
+ clock-frequency = <400000>;
+
+@@ -785,6 +1227,30 @@
+ status = "okay";
+ };
+
++&mdss_dp0 {
++ status = "okay";
++};
++
++&mdss_dp0_out {
++ data-lanes = <0 1>;
++};
++
++&mdss_dp1 {
++ status = "okay";
++};
++
++&mdss_dp1_out {
++ data-lanes = <0 1>;
++};
++
++&mdss_dp2 {
++ status = "okay";
++};
++
++&mdss_dp2_out {
++ data-lanes = <0 1>;
++};
++
+ &mdss_dp3 {
+ compatible = "qcom,x1e80100-dp";
+ /delete-property/ #sound-dai-cells;
+@@ -845,6 +1311,23 @@
+ status = "okay";
+ };
+
++&pcie4_port0 {
++ wifi@0 {
++ compatible = "pci17cb,1107";
++ reg = <0x10000 0x0 0x0 0x0 0x0>;
++
++ vddaon-supply = <&vreg_pmu_aon_0p59>;
++ vddwlcx-supply = <&vreg_pmu_wlcx_0p8>;
++ vddwlmx-supply = <&vreg_pmu_wlmx_0p85>;
++ vddrfacmn-supply = <&vreg_pmu_rfa_cmn>;
++ vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
++ vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
++ vddrfa1p8-supply = <&vreg_pmu_rfa_1p8>;
++ vddpcie0p9-supply = <&vreg_pmu_pcie_0p9>;
++ vddpcie1p8-supply = <&vreg_pmu_pcie_1p8>;
++ };
++};
++
+ &pcie5 {
+ perst-gpios = <&tlmm 149 GPIO_ACTIVE_LOW>;
+ wake-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>;
+@@ -883,6 +1366,26 @@
+ status = "okay";
+ };
+
++&pm8550_gpios {
++ rtmr0_default: rtmr0-reset-n-active-state {
++ pins = "gpio10";
++ function = "normal";
++ power-source = <1>; /* 1.8V */
++ bias-disable;
++ input-disable;
++ output-enable;
++ };
++
++ usb0_3p3_reg_en: usb0-3p3-reg-en-state {
++ pins = "gpio11";
++ function = "normal";
++ power-source = <1>; /* 1.8V */
++ bias-disable;
++ input-disable;
++ output-enable;
++ };
++};
++
+ &pm8550ve_8_gpios {
+ misc_3p3_reg_en: misc-3p3-reg-en-state {
+ pins = "gpio6";
+@@ -896,6 +1399,17 @@
+ };
+ };
+
++&pm8550ve_9_gpios {
++ usb0_1p8_reg_en: usb0-1p8-reg-en-state {
++ pins = "gpio8";
++ function = "normal";
++ power-source = <1>; /* 1.8V */
++ bias-disable;
++ input-disable;
++ output-enable;
++ };
++};
++
+ &pmc8380_3_gpios {
+ edp_bl_en: edp-bl-en-state {
+ pins = "gpio4";
+@@ -906,6 +1420,17 @@
+ };
+ };
+
++&pmc8380_5_gpios {
++ usb0_pwr_1p15_reg_en: usb0-pwr-1p15-reg-en-state {
++ pins = "gpio8";
++ function = "normal";
++ power-source = <1>; /* 1.8V */
++ bias-disable;
++ input-disable;
++ output-enable;
++ };
++};
++
+ &qupv3_0 {
+ status = "okay";
+ };
+@@ -1135,6 +1660,20 @@
+ };
+ };
+
++ rtmr1_default: rtmr1-reset-n-active-state {
++ pins = "gpio176";
++ function = "gpio";
++ drive-strength = <2>;
++ bias-disable;
++ };
++
++ rtmr2_default: rtmr2-reset-n-active-state {
++ pins = "gpio185";
++ function = "gpio";
++ drive-strength = <2>;
++ bias-disable;
++ };
++
+ tpad_default: tpad-default-state {
+ pins = "gpio3";
+ function = "gpio";
+@@ -1156,6 +1695,48 @@
+ };
+ };
+
++ usb1_pwr_1p15_reg_en: usb1-pwr-1p15-reg-en-state {
++ pins = "gpio188";
++ function = "gpio";
++ drive-strength = <2>;
++ bias-disable;
++ };
++
++ usb1_pwr_1p8_reg_en: usb1-pwr-1p8-reg-en-state {
++ pins = "gpio175";
++ function = "gpio";
++ drive-strength = <2>;
++ bias-disable;
++ };
++
++ usb1_pwr_3p3_reg_en: usb1-pwr-3p3-reg-en-state {
++ pins = "gpio186";
++ function = "gpio";
++ drive-strength = <2>;
++ bias-disable;
++ };
++
++ usb2_pwr_1p15_reg_en: usb2-pwr-1p15-reg-en-state {
++ pins = "gpio189";
++ function = "gpio";
++ drive-strength = <2>;
++ bias-disable;
++ };
++
++ usb2_pwr_1p8_reg_en: usb2-pwr-1p8-reg-en-state {
++ pins = "gpio126";
++ function = "gpio";
++ drive-strength = <2>;
++ bias-disable;
++ };
++
++ usb2_pwr_3p3_reg_en: usb2-pwr-3p3-reg-en-state {
++ pins = "gpio187";
++ function = "gpio";
++ drive-strength = <2>;
++ bias-disable;
++ };
++
+ wcd_default: wcd-reset-n-active-state {
+ pins = "gpio191";
+ function = "gpio";
+@@ -1164,6 +1745,20 @@
+ output-low;
+ };
+
++ wcn_sw_en: wcn-sw-en-state {
++ pins = "gpio214";
++ function = "gpio";
++ drive-strength = <2>;
++ bias-disable;
++ };
++
++ wcn_wlan_bt_en: wcn-wlan-bt-en-state {
++ pins = "gpio116", "gpio117";
++ function = "gpio";
++ drive-strength = <2>;
++ bias-disable;
++ };
++
+ wwan_sw_en: wwan-sw-en-state {
+ pins = "gpio221";
+ function = "gpio";
+@@ -1172,6 +1767,23 @@
+ };
+ };
+
++&uart14 {
++ status = "okay";
++
++ bluetooth {
++ compatible = "qcom,wcn7850-bt";
++ max-speed = <3200000>;
++
++ vddaon-supply = <&vreg_pmu_aon_0p59>;
++ vddwlcx-supply = <&vreg_pmu_wlcx_0p8>;
++ vddwlmx-supply = <&vreg_pmu_wlmx_0p85>;
++ vddrfacmn-supply = <&vreg_pmu_rfa_cmn>;
++ vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
++ vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
++ vddrfa1p8-supply = <&vreg_pmu_rfa_1p8>;
++ };
++};
++
+ &uart21 {
+ compatible = "qcom,geni-debug-uart";
+ status = "okay";
+@@ -1187,7 +1799,7 @@
+ };
+
+ &usb_1_ss0_qmpphy {
+- vdda-phy-supply = <&vreg_l3e_1p2>;
++ vdda-phy-supply = <&vreg_l2j_1p2>;
+ vdda-pll-supply = <&vreg_l1j_0p8>;
+
+ status = "okay";
+@@ -1206,7 +1818,7 @@
+ };
+
+ &usb_1_ss0_qmpphy_out {
+- remote-endpoint = <&pmic_glink_ss0_ss_in>;
++ remote-endpoint = <&retimer_ss0_ss_in>;
+ };
+
+ &usb_1_ss1_hsphy {
+@@ -1219,7 +1831,7 @@
+ };
+
+ &usb_1_ss1_qmpphy {
+- vdda-phy-supply = <&vreg_l3e_1p2>;
++ vdda-phy-supply = <&vreg_l2j_1p2>;
+ vdda-pll-supply = <&vreg_l2d_0p9>;
+
+ status = "okay";
+@@ -1238,7 +1850,7 @@
+ };
+
+ &usb_1_ss1_qmpphy_out {
+- remote-endpoint = <&pmic_glink_ss1_ss_in>;
++ remote-endpoint = <&retimer_ss1_ss_in>;
+ };
+
+ &usb_1_ss2_hsphy {
+@@ -1251,7 +1863,7 @@
+ };
+
+ &usb_1_ss2_qmpphy {
+- vdda-phy-supply = <&vreg_l3e_1p2>;
++ vdda-phy-supply = <&vreg_l2j_1p2>;
+ vdda-pll-supply = <&vreg_l2d_0p9>;
+
+ status = "okay";
+@@ -1270,5 +1882,5 @@
+ };
+
+ &usb_1_ss2_qmpphy_out {
+- remote-endpoint = <&pmic_glink_ss2_ss_in>;
++ remote-endpoint = <&retimer_ss2_ss_in>;
+ };
Index: sysutils/firmware/arm64-qcom-dtb/patches/patch-src_arm64_qcom_x1e80100-dell-xps13-9345_dts
===================================================================
RCS file: sysutils/firmware/arm64-qcom-dtb/patches/patch-src_arm64_qcom_x1e80100-dell-xps13-9345_dts
diff -N sysutils/firmware/arm64-qcom-dtb/patches/patch-src_arm64_qcom_x1e80100-dell-xps13-9345_dts
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ sysutils/firmware/arm64-qcom-dtb/patches/patch-src_arm64_qcom_x1e80100-dell-xps13-9345_dts 25 Jan 2025 12:51:42 -0000
@@ -0,0 +1,21 @@
+Index: src/arm64/qcom/x1e80100-dell-xps13-9345.dts
+--- src/arm64/qcom/x1e80100-dell-xps13-9345.dts.orig
++++ src/arm64/qcom/x1e80100-dell-xps13-9345.dts
+@@ -820,7 +820,7 @@
+ };
+
+ &usb_1_ss0_qmpphy {
+- vdda-phy-supply = <&vreg_l3e_1p2>;
++ vdda-phy-supply = <&vreg_l2j_1p2>;
+ vdda-pll-supply = <&vreg_l1j_0p9>;
+
+ status = "okay";
+@@ -852,7 +852,7 @@
+ };
+
+ &usb_1_ss1_qmpphy {
+- vdda-phy-supply = <&vreg_l3e_1p2>;
++ vdda-phy-supply = <&vreg_l2j_1p2>;
+ vdda-pll-supply = <&vreg_l2d_0p9>;
+
+ status = "okay";
Index: sysutils/firmware/arm64-qcom-dtb/patches/patch-src_arm64_qcom_x1e80100-honor-magicbook-art-14_dts
===================================================================
RCS file: sysutils/firmware/arm64-qcom-dtb/patches/patch-src_arm64_qcom_x1e80100-honor-magicbook-art-14_dts
diff -N sysutils/firmware/arm64-qcom-dtb/patches/patch-src_arm64_qcom_x1e80100-honor-magicbook-art-14_dts
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ sysutils/firmware/arm64-qcom-dtb/patches/patch-src_arm64_qcom_x1e80100-honor-magicbook-art-14_dts 25 Jan 2025 12:51:42 -0000
@@ -0,0 +1,1212 @@
+Index: src/arm64/qcom/x1e80100-honor-magicbook-art-14.dts
+--- src/arm64/qcom/x1e80100-honor-magicbook-art-14.dts.orig
++++ src/arm64/qcom/x1e80100-honor-magicbook-art-14.dts
+@@ -0,0 +1,1208 @@
++// SPDX-License-Identifier: BSD-3-Clause
++/*
++ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
++ * Copyright (c) 2025 Kirill A. Korinsky <kirill@korins.ky>
++ */
++
++/dts-v1/;
++
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/input/gpio-keys.h>
++#include <dt-bindings/input/input.h>
++#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
++#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
++
++#include "x1e80100.dtsi"
++#include "x1e80100-pmics.dtsi"
++
++/ {
++ model = "HONOR MagicBook Art 14 Snapdragon";
++ compatible = "honor,magicbook-art-14-snapdragon", "qcom,x1e80100";
++ chassis-type = "laptop";
++
++ aliases {
++ serial0 = &uart21;
++ };
++
++ wcd938x: audio-codec {
++ compatible = "qcom,wcd9385-codec";
++
++ pinctrl-names = "default";
++ pinctrl-0 = <&wcd_default>;
++
++ qcom,micbias1-microvolt = <1800000>;
++ qcom,micbias2-microvolt = <1800000>;
++ qcom,micbias3-microvolt = <1800000>;
++ qcom,micbias4-microvolt = <1800000>;
++ qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 500000 500000 500000>;
++ qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
++ qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
++ qcom,rx-device = <&wcd_rx>;
++ qcom,tx-device = <&wcd_tx>;
++
++ reset-gpios = <&tlmm 191 GPIO_ACTIVE_LOW>;
++
++ vdd-buck-supply = <&vreg_l15b_1p8>;
++ vdd-rxtx-supply = <&vreg_l15b_1p8>;
++ vdd-io-supply = <&vreg_l15b_1p8>;
++ vdd-mic-bias-supply = <&vreg_bob1>;
++
++ #sound-dai-cells = <1>;
++ };
++
++ gpio-keys {
++ compatible = "gpio-keys";
++
++ pinctrl-0 = <&hall_int_n_default>;
++ pinctrl-names = "default";
++
++ switch-lid {
++ gpios = <&tlmm 92 GPIO_ACTIVE_LOW>;
++ linux,input-type = <EV_SW>;
++ linux,code = <SW_LID>;
++ wakeup-source;
++ wakeup-event-action = <EV_ACT_DEASSERTED>;
++ };
++ };
++
++ pmic-glink {
++ compatible = "qcom,x1e80100-pmic-glink",
++ "qcom,sm8550-pmic-glink",
++ "qcom,pmic-glink";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ orientation-gpios = <&tlmm 121 GPIO_ACTIVE_HIGH>,
++ <&tlmm 123 GPIO_ACTIVE_HIGH>,
++ <&tlmm 125 GPIO_ACTIVE_HIGH>;
++
++ /* Left-side rear port */
++ connector@0 {
++ compatible = "usb-c-connector";
++ reg = <0>;
++ power-role = "dual";
++ data-role = "dual";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ reg = <0>;
++
++ pmic_glink_ss0_hs_in: endpoint {
++ remote-endpoint = <&usb_1_ss0_dwc3_hs>;
++ };
++ };
++
++ port@1 {
++ reg = <1>;
++
++ pmic_glink_ss0_ss_in: endpoint {
++ remote-endpoint = <&usb_1_ss0_qmpphy_out>;
++ };
++ };
++ };
++ };
++
++ /* Left-side front port */
++ connector@1 {
++ compatible = "usb-c-connector";
++ reg = <1>;
++ power-role = "dual";
++ data-role = "dual";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ reg = <0>;
++
++ pmic_glink_ss1_hs_in: endpoint {
++ remote-endpoint = <&usb_1_ss1_dwc3_hs>;
++ };
++ };
++
++ port@1 {
++ reg = <1>;
++
++ pmic_glink_ss1_ss_in: endpoint {
++ remote-endpoint = <&usb_1_ss1_qmpphy_out>;
++ };
++ };
++ };
++ };
++
++ /* Magnetic camera */
++ connector@2 {
++ compatible = "usb-c-connector";
++ reg = <2>;
++ power-role = "dual";
++ data-role = "dual";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ reg = <0>;
++
++ pmic_glink_usb_2_hs_in: endpoint {
++ remote-endpoint = <&usb_2_dwc3_hs>;
++ };
++ };
++ };
++ };
++
++ };
++
++ reserved-memory {
++ linux,cma {
++ compatible = "shared-dma-pool";
++ size = <0x0 0x8000000>;
++ reusable;
++ linux,cma-default;
++ };
++ };
++
++ sound {
++ compatible = "qcom,x1e80100-sndcard";
++ model = "X1E80100-CRD";
++ audio-routing = "WooferLeft IN", "WSA WSA_SPK1 OUT",
++ "TweeterLeft IN", "WSA WSA_SPK2 OUT",
++ "WooferRight IN", "WSA2 WSA_SPK2 OUT",
++ "TweeterRight IN", "WSA2 WSA_SPK2 OUT",
++ "IN1_HPHL", "HPHL_OUT",
++ "IN2_HPHR", "HPHR_OUT",
++ "AMIC2", "MIC BIAS2",
++ "VA DMIC0", "MIC BIAS3",
++ "VA DMIC1", "MIC BIAS3",
++ "VA DMIC2", "MIC BIAS1",
++ "VA DMIC3", "MIC BIAS1",
++ "VA DMIC0", "VA MIC BIAS3",
++ "VA DMIC1", "VA MIC BIAS3",
++ "VA DMIC2", "VA MIC BIAS1",
++ "VA DMIC3", "VA MIC BIAS1",
++ "TX SWR_INPUT1", "ADC2_OUTPUT";
++
++ wcd-playback-dai-link {
++ link-name = "WCD Playback";
++
++ cpu {
++ sound-dai = <&q6apmbedai RX_CODEC_DMA_RX_0>;
++ };
++
++ codec {
++ sound-dai = <&wcd938x 0>, <&swr1 0>, <&lpass_rxmacro 0>;
++ };
++
++ platform {
++ sound-dai = <&q6apm>;
++ };
++ };
++
++ wcd-capture-dai-link {
++ link-name = "WCD Capture";
++
++ cpu {
++ sound-dai = <&q6apmbedai TX_CODEC_DMA_TX_3>;
++ };
++
++ codec {
++ sound-dai = <&wcd938x 1>, <&swr2 1>, <&lpass_txmacro 0>;
++ };
++
++ platform {
++ sound-dai = <&q6apm>;
++ };
++ };
++
++ wsa-dai-link {
++ link-name = "WSA Playback";
++
++ cpu {
++ sound-dai = <&q6apmbedai WSA_CODEC_DMA_RX_0>;
++ };
++
++ codec {
++ sound-dai = <&left_woofer>, <&left_tweeter>,
++ <&swr0 0>, <&lpass_wsamacro 0>,
++ <&right_woofer>, <&right_tweeter>,
++ <&swr3 0>, <&lpass_wsa2macro 0>;
++ };
++
++ platform {
++ sound-dai = <&q6apm>;
++ };
++ };
++
++ va-dai-link {
++ link-name = "VA Capture";
++
++ cpu {
++ sound-dai = <&q6apmbedai VA_CODEC_DMA_TX_0>;
++ };
++
++ codec {
++ sound-dai = <&lpass_vamacro 0>;
++ };
++
++ platform {
++ sound-dai = <&q6apm>;
++ };
++ };
++ };
++
++ vreg_edp_3p3: regulator-edp-3p3 {
++ compatible = "regulator-fixed";
++
++ regulator-name = "VREG_EDP_3P3";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++
++ gpio = <&tlmm 70 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
++
++ pinctrl-0 = <&edp_reg_en>;
++ pinctrl-names = "default";
++
++ regulator-boot-on;
++ };
++
++ vreg_misc_3p3: regulator-misc-3p3 {
++ compatible = "regulator-fixed";
++
++ regulator-name = "VREG_MISC_3P3";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++
++ gpio = <&pm8550ve_8_gpios 6 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
++
++ pinctrl-names = "default";
++ pinctrl-0 = <&misc_3p3_reg_en>;
++
++ regulator-boot-on;
++ regulator-always-on;
++ };
++
++ vph_pwr: regulator-vph-pwr {
++ compatible = "regulator-fixed";
++
++ regulator-name = "vph_pwr";
++ regulator-min-microvolt = <3700000>;
++ regulator-max-microvolt = <3700000>;
++
++ regulator-always-on;
++ regulator-boot-on;
++ };
++};
++
++&apps_rsc {
++ regulators-0 {
++ compatible = "qcom,pm8550-rpmh-regulators";
++ qcom,pmic-id = "b";
++
++ vdd-bob1-supply = <&vph_pwr>;
++ vdd-bob2-supply = <&vph_pwr>;
++ vdd-l1-l4-l10-supply = <&vreg_s4c_1p8>;
++ vdd-l2-l13-l14-supply = <&vreg_bob1>;
++ vdd-l5-l16-supply = <&vreg_bob1>;
++ vdd-l6-l7-supply = <&vreg_bob2>;
++ vdd-l8-l9-supply = <&vreg_bob1>;
++ vdd-l12-supply = <&vreg_s5j_1p2>;
++ vdd-l15-supply = <&vreg_s4c_1p8>;
++ vdd-l17-supply = <&vreg_bob2>;
++
++ vreg_bob1: bob1 {
++ regulator-name = "vreg_bob1";
++ regulator-min-microvolt = <3008000>;
++ regulator-max-microvolt = <3960000>;
++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ };
++
++ vreg_bob2: bob2 {
++ regulator-name = "vreg_bob2";
++ regulator-min-microvolt = <2504000>;
++ regulator-max-microvolt = <3008000>;
++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ };
++
++ vreg_l1b_1p8: ldo1 {
++ regulator-name = "vreg_l1b_1p8";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ };
++
++ vreg_l2b_3p0: ldo2 {
++ regulator-name = "vreg_l2b_3p0";
++ regulator-min-microvolt = <3072000>;
++ regulator-max-microvolt = <3100000>;
++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ };
++
++ vreg_l4b_1p8: ldo4 {
++ regulator-name = "vreg_l4b_1p8";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ };
++
++ vreg_l5b_3p0: ldo5 {
++ regulator-name = "vreg_l5b_3p0";
++ regulator-min-microvolt = <3000000>;
++ regulator-max-microvolt = <3000000>;
++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ };
++
++ vreg_l6b_1p8: ldo6 {
++ regulator-name = "vreg_l6b_1p8";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <2960000>;
++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ };
++
++ vreg_l7b_2p8: ldo7 {
++ regulator-name = "vreg_l7b_2p8";
++ regulator-min-microvolt = <2800000>;
++ regulator-max-microvolt = <2800000>;
++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ };
++
++ vreg_l8b_3p0: ldo8 {
++ regulator-name = "vreg_l8b_3p0";
++ regulator-min-microvolt = <3072000>;
++ regulator-max-microvolt = <3072000>;
++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ };
++
++ vreg_l9b_2p9: ldo9 {
++ regulator-name = "vreg_l9b_2p9";
++ regulator-min-microvolt = <2960000>;
++ regulator-max-microvolt = <2960000>;
++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ };
++
++ vreg_l10b_1p8: ldo10 {
++ regulator-name = "vreg_l10b_1p8";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ };
++
++ vreg_l12b_1p2: ldo12 {
++ regulator-name = "vreg_l12b_1p2";
++ regulator-min-microvolt = <1200000>;
++ regulator-max-microvolt = <1200000>;
++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ };
++
++ vreg_l13b_3p0: ldo13 {
++ regulator-name = "vreg_l13b_3p0";
++ regulator-min-microvolt = <3072000>;
++ regulator-max-microvolt = <3100000>;
++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ };
++
++ vreg_l14b_3p0: ldo14 {
++ regulator-name = "vreg_l14b_3p0";
++ regulator-min-microvolt = <3072000>;
++ regulator-max-microvolt = <3072000>;
++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ };
++
++ vreg_l15b_1p8: ldo15 {
++ regulator-name = "vreg_l15b_1p8";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ };
++
++ vreg_l16b_2p9: ldo16 {
++ regulator-name = "vreg_l16b_2p9";
++ regulator-min-microvolt = <2912000>;
++ regulator-max-microvolt = <2912000>;
++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ };
++
++ vreg_l17b_2p5: ldo17 {
++ regulator-name = "vreg_l17b_2p5";
++ regulator-min-microvolt = <2504000>;
++ regulator-max-microvolt = <2504000>;
++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ };
++ };
++
++ regulators-1 {
++ compatible = "qcom,pm8550ve-rpmh-regulators";
++ qcom,pmic-id = "c";
++
++ vdd-l1-supply = <&vreg_s5j_1p2>;
++ vdd-l2-supply = <&vreg_s1f_0p7>;
++ vdd-l3-supply = <&vreg_s1f_0p7>;
++ vdd-s4-supply = <&vph_pwr>;
++
++ vreg_s4c_1p8: smps4 {
++ regulator-name = "vreg_s4c_1p8";
++ regulator-min-microvolt = <1856000>;
++ regulator-max-microvolt = <2000000>;
++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ };
++
++ vreg_l1c_1p2: ldo1 {
++ regulator-name = "vreg_l1c_1p2";
++ regulator-min-microvolt = <1200000>;
++ regulator-max-microvolt = <1200000>;
++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ };
++
++ vreg_l2c_0p8: ldo2 {
++ regulator-name = "vreg_l2c_0p8";
++ regulator-min-microvolt = <880000>;
++ regulator-max-microvolt = <920000>;
++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ };
++
++ vreg_l3c_0p8: ldo3 {
++ regulator-name = "vreg_l3c_0p8";
++ regulator-min-microvolt = <880000>;
++ regulator-max-microvolt = <920000>;
++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ };
++ };
++
++ regulators-2 {
++ compatible = "qcom,pmc8380-rpmh-regulators";
++ qcom,pmic-id = "d";
++
++ vdd-l1-supply = <&vreg_s1f_0p7>;
++ vdd-l2-supply = <&vreg_s1f_0p7>;
++ vdd-l3-supply = <&vreg_s4c_1p8>;
++ vdd-s1-supply = <&vph_pwr>;
++
++ vreg_l1d_0p8: ldo1 {
++ regulator-name = "vreg_l1d_0p8";
++ regulator-min-microvolt = <880000>;
++ regulator-max-microvolt = <920000>;
++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ };
++
++ vreg_l2d_0p9: ldo2 {
++ regulator-name = "vreg_l2d_0p9";
++ regulator-min-microvolt = <912000>;
++ regulator-max-microvolt = <920000>;
++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ };
++
++ vreg_l3d_1p8: ldo3 {
++ regulator-name = "vreg_l3d_1p8";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ };
++ };
++
++ regulators-3 {
++ compatible = "qcom,pmc8380-rpmh-regulators";
++ qcom,pmic-id = "e";
++
++ vdd-l2-supply = <&vreg_s1f_0p7>;
++ vdd-l3-supply = <&vreg_s5j_1p2>;
++
++ vreg_l2e_0p8: ldo2 {
++ regulator-name = "vreg_l2e_0p8";
++ regulator-min-microvolt = <880000>;
++ regulator-max-microvolt = <920000>;
++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ };
++
++ vreg_l3e_1p2: ldo3 {
++ regulator-name = "vreg_l3e_1p2";
++ regulator-min-microvolt = <1200000>;
++ regulator-max-microvolt = <1200000>;
++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ };
++ };
++
++ regulators-4 {
++ compatible = "qcom,pmc8380-rpmh-regulators";
++ qcom,pmic-id = "f";
++
++ vdd-l1-supply = <&vreg_s5j_1p2>;
++ vdd-l2-supply = <&vreg_s5j_1p2>;
++ vdd-l3-supply = <&vreg_s5j_1p2>;
++ vdd-s1-supply = <&vph_pwr>;
++
++ vreg_s1f_0p7: smps1 {
++ regulator-name = "vreg_s1f_0p7";
++ regulator-min-microvolt = <700000>;
++ regulator-max-microvolt = <1100000>;
++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ };
++
++ vreg_l1f_1p0: ldo1 {
++ regulator-name = "vreg_l1f_1p0";
++ regulator-min-microvolt = <1024000>;
++ regulator-max-microvolt = <1024000>;
++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ };
++
++ vreg_l2f_1p0: ldo2 {
++ regulator-name = "vreg_l2f_1p0";
++ regulator-min-microvolt = <1024000>;
++ regulator-max-microvolt = <1024000>;
++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ };
++
++ vreg_l3f_1p0: ldo3 {
++ regulator-name = "vreg_l3f_1p0";
++ regulator-min-microvolt = <1024000>;
++ regulator-max-microvolt = <1024000>;
++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ };
++ };
++
++ regulators-6 {
++ compatible = "qcom,pm8550ve-rpmh-regulators";
++ qcom,pmic-id = "i";
++
++ vdd-l1-supply = <&vreg_s4c_1p8>;
++ vdd-l2-supply = <&vreg_s5j_1p2>;
++ vdd-l3-supply = <&vreg_s1f_0p7>;
++ vdd-s1-supply = <&vph_pwr>;
++ vdd-s2-supply = <&vph_pwr>;
++
++ vreg_s1i_0p9: smps1 {
++ regulator-name = "vreg_s1i_0p9";
++ regulator-min-microvolt = <900000>;
++ regulator-max-microvolt = <920000>;
++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ };
++
++ vreg_s2i_1p0: smps2 {
++ regulator-name = "vreg_s2i_1p0";
++ regulator-min-microvolt = <1000000>;
++ regulator-max-microvolt = <1100000>;
++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ };
++
++ vreg_l1i_1p8: ldo1 {
++ regulator-name = "vreg_l1i_1p8";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ };
++
++ vreg_l2i_1p2: ldo2 {
++ regulator-name = "vreg_l2i_1p2";
++ regulator-min-microvolt = <1200000>;
++ regulator-max-microvolt = <1200000>;
++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ };
++
++ vreg_l3i_0p8: ldo3 {
++ regulator-name = "vreg_l3i_0p8";
++ regulator-min-microvolt = <880000>;
++ regulator-max-microvolt = <920000>;
++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ };
++ };
++
++ regulators-7 {
++ compatible = "qcom,pm8550ve-rpmh-regulators";
++ qcom,pmic-id = "j";
++
++ vdd-l1-supply = <&vreg_s1f_0p7>;
++ vdd-l2-supply = <&vreg_s5j_1p2>;
++ vdd-l3-supply = <&vreg_s1f_0p7>;
++ vdd-s5-supply = <&vph_pwr>;
++
++ vreg_s5j_1p2: smps5 {
++ regulator-name = "vreg_s5j_1p2";
++ regulator-min-microvolt = <1256000>;
++ regulator-max-microvolt = <1304000>;
++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ };
++
++ vreg_l1j_0p8: ldo1 {
++ regulator-name = "vreg_l1j_0p8";
++ regulator-min-microvolt = <880000>;
++ regulator-max-microvolt = <920000>;
++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ };
++
++ vreg_l2j_1p2: ldo2 {
++ regulator-name = "vreg_l2j_1p2";
++ regulator-min-microvolt = <1200000>;
++ regulator-max-microvolt = <1200000>;
++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ };
++
++ vreg_l3j_0p8: ldo3 {
++ regulator-name = "vreg_l3j_0p8";
++ regulator-min-microvolt = <880000>;
++ regulator-max-microvolt = <920000>;
++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ };
++ };
++};
++
++&gpu {
++ status = "okay";
++
++ zap-shader {
++ firmware-name = "qcom/x1e80100/HONOR/MRO-XXX/qcdxkmsuc8380.mbn";
++ };
++};
++
++&i2c1 {
++ clock-frequency = <400000>;
++
++ status = "okay";
++
++ touchpad@5d {
++ compatible = "hid-over-i2c";
++ reg = <0x5d>;
++
++ hid-descr-addr = <0x1>;
++ interrupts-extended = <&tlmm 24 IRQ_TYPE_LEVEL_LOW>;
++
++ vdd-supply = <&vreg_misc_3p3>;
++ vddl-supply = <&vreg_l12b_1p2>;
++
++ pinctrl-0 = <&tpad_default>;
++ pinctrl-names = "default";
++
++ wakeup-source;
++ };
++};
++
++&i2c5 {
++ clock-frequency = <400000>;
++
++ status = "okay";
++
++ eusb5_repeater: redriver@43 {
++ compatible = "nxp,ptn3222";
++ reg = <0x43>;
++ #phy-cells = <0>;
++
++ vdd3v3-supply = <&vreg_l13b_3p0>;
++ vdd1v8-supply = <&vreg_l4b_1p8>;
++
++ reset-gpios = <&tlmm 7 GPIO_ACTIVE_LOW>;
++
++ pinctrl-0 = <&eusb5_reset_n>;
++ pinctrl-names = "default";
++ };
++
++ eusb6_repeater: redriver@4f {
++ compatible = "nxp,ptn3222";
++ reg = <0x4f>;
++ #phy-cells = <0>;
++
++ vdd3v3-supply = <&vreg_l13b_3p0>;
++ vdd1v8-supply = <&vreg_l4b_1p8>;
++
++ reset-gpios = <&tlmm 184 GPIO_ACTIVE_LOW>;
++
++ pinctrl-0 = <&eusb6_reset_n>;
++ pinctrl-names = "default";
++ };
++};
++
++&i2c8 {
++ clock-frequency = <400000>;
++
++ status = "okay";
++
++ touchscreen@38 {
++ compatible = "hid-over-i2c";
++ reg = <0x38>;
++
++ hid-descr-addr = <0x1>;
++ interrupts-extended = <&tlmm 51 IRQ_TYPE_LEVEL_LOW>;
++
++ vdd-supply = <&vreg_misc_3p3>;
++ /* Lower power supply is not enoug to work. */
++ // vddl-supply = <&vreg_l15b_1p8>;
++
++ pinctrl-0 = <&ts0_default>;
++ pinctrl-names = "default";
++ };
++};
++
++&i2c9 {
++ clock-frequency = <400000>;
++
++ status = "okay";
++
++ keyboard@3a {
++ compatible = "hid-over-i2c";
++ reg = <0x3a>;
++
++ hid-descr-addr = <0x1>;
++ interrupts-extended = <&tlmm 67 IRQ_TYPE_LEVEL_LOW>;
++
++ vdd-supply = <&vreg_misc_3p3>;
++ vddl-supply = <&vreg_l12b_1p2>;
++
++ pinctrl-0 = <&kybd_default>;
++ pinctrl-names = "default";
++
++ wakeup-source;
++ };
++};
++
++&lpass_tlmm {
++ spkr_01_sd_n_active: spkr-01-sd-n-active-state {
++ pins = "gpio12";
++ function = "gpio";
++ drive-strength = <16>;
++ bias-disable;
++ output-low;
++ };
++
++ spkr_23_sd_n_active: spkr-23-sd-n-active-state {
++ pins = "gpio13";
++ function = "gpio";
++ drive-strength = <16>;
++ bias-disable;
++ output-low;
++ };
++};
++
++&lpass_vamacro {
++ pinctrl-0 = <&dmic01_default>, <&dmic23_default>;
++ pinctrl-names = "default";
++
++ vdd-micb-supply = <&vreg_l1b_1p8>;
++ qcom,dmic-sample-rate = <4800000>;
++};
++
++&mdss {
++ status = "okay";
++};
++
++&mdss_dp3 {
++ compatible = "qcom,x1e80100-dp";
++ /delete-property/ #sound-dai-cells;
++
++ status = "okay";
++
++ aux-bus {
++ panel {
++ compatible = "samsung,atna45af01", "samsung,atna33xc20";
++ enable-gpios = <&pmc8380_3_gpios 4 GPIO_ACTIVE_HIGH>;
++ power-supply = <&vreg_edp_3p3>;
++
++ pinctrl-0 = <&edp_bl_en>;
++ pinctrl-names = "default";
++
++ port {
++ edp_panel_in: endpoint {
++ remote-endpoint = <&mdss_dp3_out>;
++ };
++ };
++ };
++ };
++
++ ports {
++ port@1 {
++ reg = <1>;
++ mdss_dp3_out: endpoint {
++ data-lanes = <0 1 2 3>;
++ link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
++
++ remote-endpoint = <&edp_panel_in>;
++ };
++ };
++ };
++};
++
++&mdss_dp3_phy {
++ vdda-phy-supply = <&vreg_l3j_0p8>;
++ vdda-pll-supply = <&vreg_l2j_1p2>;
++
++ status = "okay";
++};
++
++&pcie4 {
++ perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
++ wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
++
++ pinctrl-0 = <&pcie4_default>;
++ pinctrl-names = "default";
++
++ status = "okay";
++};
++
++&pcie4_phy {
++ vdda-phy-supply = <&vreg_l3i_0p8>;
++ vdda-pll-supply = <&vreg_l3e_1p2>;
++
++ status = "okay";
++};
++
++&pm8550ve_8_gpios {
++ misc_3p3_reg_en: misc-3p3-reg-en-state {
++ pins = "gpio6";
++ function = "normal";
++ bias-disable;
++ input-disable;
++ output-enable;
++ drive-push-pull;
++ power-source = <1>; /* 1.8 V */
++ qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>;
++ };
++};
++
++&pmc8380_3_gpios {
++ edp_bl_en: edp-bl-en-state {
++ pins = "gpio4";
++ function = "normal";
++ power-source = <1>; /* 1.8V */
++ input-disable;
++ output-enable;
++ };
++};
++
++&qupv3_0 {
++ status = "okay";
++};
++
++&qupv3_1 {
++ status = "okay";
++};
++
++&qupv3_2 {
++ status = "okay";
++};
++
++&remoteproc_adsp {
++ firmware-name = "qcom/x1e80100/HONOR/MRO-XXX/qcadsp8380.mbn",
++ "qcom/x1e80100/HONOR/MRO-XXX/adsp_dtbs.elf";
++
++ status = "okay";
++};
++
++&remoteproc_cdsp {
++ firmware-name = "qcom/x1e80100/HONOR/MRO-XXX/qccdsp8380.mbn",
++ "qcom/x1e80100/HONOR/MRO-XXX/cdsp_dtbs.elf";
++
++ status = "okay";
++};
++
++&smb2360_0_eusb2_repeater {
++ vdd18-supply = <&vreg_l3d_1p8>;
++ vdd3-supply = <&vreg_l2b_3p0>;
++};
++
++&smb2360_1_eusb2_repeater {
++ vdd18-supply = <&vreg_l3d_1p8>;
++ vdd3-supply = <&vreg_l14b_3p0>;
++};
++
++&smb2360_2 {
++ status = "okay";
++};
++
++&smb2360_2_eusb2_repeater {
++ vdd18-supply = <&vreg_l3d_1p8>;
++ vdd3-supply = <&vreg_l8b_3p0>;
++};
++
++&swr0 {
++ status = "okay";
++
++ pinctrl-0 = <&wsa_swr_active>, <&spkr_01_sd_n_active>;
++ pinctrl-names = "default";
++
++ /* WSA8845, Left Woofer */
++ left_woofer: speaker@0,0 {
++ compatible = "sdw20217020400";
++ reg = <0 0>;
++ reset-gpios = <&lpass_tlmm 12 GPIO_ACTIVE_LOW>;
++ #sound-dai-cells = <0>;
++ sound-name-prefix = "WooferLeft";
++ vdd-1p8-supply = <&vreg_l15b_1p8>;
++ vdd-io-supply = <&vreg_l12b_1p2>;
++ qcom,port-mapping = <1 2 3 7 10 13>;
++ };
++
++ /* WSA8845, Left Tweeter */
++ left_tweeter: speaker@0,1 {
++ compatible = "sdw20217020400";
++ reg = <0 1>;
++ reset-gpios = <&lpass_tlmm 12 GPIO_ACTIVE_LOW>;
++ #sound-dai-cells = <0>;
++ sound-name-prefix = "TweeterLeft";
++ vdd-1p8-supply = <&vreg_l15b_1p8>;
++ vdd-io-supply = <&vreg_l12b_1p2>;
++ qcom,port-mapping = <4 5 6 7 11 13>;
++ };
++};
++
++&swr1 {
++ status = "okay";
++
++ /* WCD9385 RX */
++ wcd_rx: codec@0,4 {
++ compatible = "sdw20217010d00";
++ reg = <0 4>;
++ qcom,rx-port-mapping = <1 2 3 4 5>;
++ };
++};
++
++&swr2 {
++ status = "okay";
++
++ /* WCD9385 TX */
++ wcd_tx: codec@0,3 {
++ compatible = "sdw20217010d00";
++ reg = <0 3>;
++ qcom,tx-port-mapping = <2 2 3 4>;
++ };
++};
++
++&swr3 {
++ status = "okay";
++
++ pinctrl-0 = <&wsa2_swr_active>, <&spkr_23_sd_n_active>;
++ pinctrl-names = "default";
++
++ /* WSA8845, Right Woofer */
++ right_woofer: speaker@0,0 {
++ compatible = "sdw20217020400";
++ reg = <0 0>;
++ reset-gpios = <&lpass_tlmm 13 GPIO_ACTIVE_LOW>;
++ #sound-dai-cells = <0>;
++ sound-name-prefix = "WooferRight";
++ vdd-1p8-supply = <&vreg_l15b_1p8>;
++ vdd-io-supply = <&vreg_l12b_1p2>;
++ qcom,port-mapping = <1 2 3 7 10 13>;
++ };
++
++ /* WSA8845, Right Tweeter */
++ right_tweeter: speaker@0,1 {
++ compatible = "sdw20217020400";
++ reg = <0 1>;
++ reset-gpios = <&lpass_tlmm 13 GPIO_ACTIVE_LOW>;
++ #sound-dai-cells = <0>;
++ sound-name-prefix = "TweeterRight";
++ vdd-1p8-supply = <&vreg_l15b_1p8>;
++ vdd-io-supply = <&vreg_l12b_1p2>;
++ qcom,port-mapping = <4 5 6 7 11 13>;
++ };
++};
++
++&tlmm {
++ gpio-reserved-ranges = <34 2>, /* Unused */
++ <44 4>, /* SPI (TPM) */
++ <238 1>; /* UFS Reset */
++
++ edp_reg_en: edp-reg-en-state {
++ pins = "gpio70";
++ function = "gpio";
++ drive-strength = <16>;
++ bias-disable;
++ };
++
++ eusb5_reset_n: eusb5-reset-n-state {
++ pins = "gpio7";
++ function = "gpio";
++ drive-strength = <2>;
++ bias-disable;
++ output-low;
++ };
++
++ eusb6_reset_n: eusb6-reset-n-state {
++ pins = "gpio184";
++ function = "gpio";
++ drive-strength = <2>;
++ bias-disable;
++ output-low;
++ };
++
++ hall_int_n_default: hall-int-n-state {
++ pins = "gpio92";
++ function = "gpio";
++ bias-disable;
++ };
++
++ kybd_default: kybd-default-state {
++ pins = "gpio67";
++ function = "gpio";
++ bias-disable;
++ };
++
++ pcie4_default: pcie4-default-state {
++ clkreq-n-pins {
++ pins = "gpio147";
++ function = "pcie4_clk";
++ drive-strength = <2>;
++ bias-pull-up;
++ };
++
++ perst-n-pins {
++ pins = "gpio146";
++ function = "gpio";
++ drive-strength = <2>;
++ bias-disable;
++ };
++
++ wake-n-pins {
++ pins = "gpio148";
++ function = "gpio";
++ drive-strength = <2>;
++ bias-pull-up;
++ };
++ };
++
++ tpad_default: tpad-default-state {
++ pins = "gpio3";
++ function = "gpio";
++ bias-disable;
++ };
++
++ ts0_default: ts0-default-state {
++ int-n-pins {
++ pins = "gpio51";
++ function = "gpio";
++ bias-disable;
++ };
++
++ reset-n-pins {
++ pins = "gpio48";
++ function = "gpio";
++ output-high;
++ drive-strength = <16>;
++ };
++ };
++
++ wcd_default: wcd-reset-n-active-state {
++ pins = "gpio191";
++ function = "gpio";
++ drive-strength = <16>;
++ bias-disable;
++ output-low;
++ };
++};
++
++&ufs_mem_hc {
++ status = "okay";
++
++ vcc-supply = <&vreg_l9b_2p9>;
++ vcc-max-microamp = <600000>;
++ vccq2-supply = <&vreg_l4b_1p8>;
++ vccq2-max-microamp = <600000>;
++};
++
++&ufs_mem_phy {
++ status = "okay";
++
++ vdda-phy-supply = <&vreg_l2c_0p8>;
++ vdda-phy-max-microamp = <62900>;
++ vdda-pll-supply = <&vreg_l12b_1p2>;
++ vdda-pll-max-microamp = <18300>;
++};
++
++&uart21 {
++ compatible = "qcom,geni-debug-uart";
++ status = "okay";
++};
++
++&usb_1_ss0_hsphy {
++ vdd-supply = <&vreg_l3j_0p8>;
++ vdda12-supply = <&vreg_l2j_1p2>;
++
++ phys = <&smb2360_0_eusb2_repeater>;
++
++ status = "okay";
++};
++
++&usb_1_ss0_qmpphy {
++ vdda-phy-supply = <&vreg_l3e_1p2>;
++ vdda-pll-supply = <&vreg_l1j_0p8>;
++
++ status = "okay";
++};
++
++&usb_1_ss0 {
++ status = "okay";
++};
++
++&usb_1_ss0_dwc3_hs {
++ remote-endpoint = <&pmic_glink_ss0_hs_in>;
++};
++
++&usb_1_ss0_qmpphy_out {
++ remote-endpoint = <&pmic_glink_ss0_ss_in>;
++};
++
++&usb_1_ss1_hsphy {
++ vdd-supply = <&vreg_l3j_0p8>;
++ vdda12-supply = <&vreg_l2j_1p2>;
++
++ phys = <&smb2360_1_eusb2_repeater>;
++
++ status = "okay";
++};
++
++&usb_1_ss1_qmpphy {
++ vdda-phy-supply = <&vreg_l3e_1p2>;
++ vdda-pll-supply = <&vreg_l2d_0p9>;
++
++ status = "okay";
++};
++
++&usb_1_ss1 {
++ status = "okay";
++};
++
++&usb_1_ss1_dwc3_hs {
++ remote-endpoint = <&pmic_glink_ss1_hs_in>;
++};
++
++&usb_1_ss1_qmpphy_out {
++ remote-endpoint = <&pmic_glink_ss1_ss_in>;
++};
++
++&usb_2_hsphy {
++ vdd-supply = <&vreg_l3j_0p8>;
++ vdda12-supply = <&vreg_l2j_1p2>;
++
++ phys = <&eusb5_repeater>;
++
++ status = "okay";
++};
++
++&usb_2_dwc3_hs {
++ remote-endpoint = <&pmic_glink_usb_2_hs_in>;
++};
++
++&usb_2 {
++ status = "okay";
++};
++
++&usb_mp_hsphy0 {
++ vdd-supply = <&vreg_l2e_0p8>;
++ vdda12-supply = <&vreg_l3e_1p2>;
++
++ phys = <&eusb6_repeater>;
++
++ status = "okay";
++};
++
++&usb_mp_qmpphy0 {
++ vdda-phy-supply = <&vreg_l3e_1p2>;
++ vdda-pll-supply = <&vreg_l3c_0p8>;
++
++ status = "okay";
++};
++
++/* MP0 goes to the USB-A port */
++&usb_mp {
++ status = "okay";
++};
Index: sysutils/firmware/arm64-qcom-dtb/patches/patch-src_arm64_qcom_x1e80100-lenovo-yoga-slim7x_dts
===================================================================
RCS file: /cvs/ports/sysutils/firmware/arm64-qcom-dtb/patches/patch-src_arm64_qcom_x1e80100-lenovo-yoga-slim7x_dts,v
diff -u -p -r1.2 patch-src_arm64_qcom_x1e80100-lenovo-yoga-slim7x_dts
--- sysutils/firmware/arm64-qcom-dtb/patches/patch-src_arm64_qcom_x1e80100-lenovo-yoga-slim7x_dts 21 Sep 2024 17:14:17 -0000 1.2
+++ sysutils/firmware/arm64-qcom-dtb/patches/patch-src_arm64_qcom_x1e80100-lenovo-yoga-slim7x_dts 25 Jan 2025 12:51:42 -0000
@@ -1,54 +1,30 @@
Index: src/arm64/qcom/x1e80100-lenovo-yoga-slim7x.dts
--- src/arm64/qcom/x1e80100-lenovo-yoga-slim7x.dts.orig
+++ src/arm64/qcom/x1e80100-lenovo-yoga-slim7x.dts
-@@ -190,7 +190,6 @@
- pinctrl-0 = <&edp_reg_en>;
- pinctrl-names = "default";
-
-- regulator-always-on;
- regulator-boot-on;
- };
-
-@@ -592,9 +591,13 @@
-
- aux-bus {
- panel {
-- compatible = "edp-panel";
-+ compatible = "samsung,atna45dc02", "samsung,atna33xc20";
-+ enable-gpios = <&pmc8380_3_gpios 4 GPIO_ACTIVE_HIGH>;
- power-supply = <&vreg_edp_3p3>;
-
-+ pinctrl-0 = <&edp_bl_en>;
-+ pinctrl-names = "default";
-+
- port {
- edp_panel_in: endpoint {
- remote-endpoint = <&mdss_dp3_out>;
-@@ -669,6 +672,16 @@
- status = "okay";
+@@ -908,7 +908,7 @@
};

-+&pmc8380_3_gpios {
-+ edp_bl_en: edp-bl-en-state {
-+ pins = "gpio4";
-+ function = "normal";
-+ power-source = <0>;
-+ input-disable;
-+ output-enable;
-+ };
-+};
-+
- &qupv3_0 {
+ &usb_1_ss0_qmpphy {
+- vdda-phy-supply = <&vreg_l3e_1p2>;
++ vdda-phy-supply = <&vreg_l2j_1p2>;
+ vdda-pll-supply = <&vreg_l1j_0p8>;
+
status = "okay";
+@@ -940,7 +940,7 @@
};
-@@ -702,6 +715,10 @@
- &smb2360_1_eusb2_repeater {
- vdd18-supply = <&vreg_l3d_1p8>;
- vdd3-supply = <&vreg_l14b_3p0>;
-+};
-+
-+&smb2360_2 {
-+ status = "okay";
+
+ &usb_1_ss1_qmpphy {
+- vdda-phy-supply = <&vreg_l3e_1p2>;
++ vdda-phy-supply = <&vreg_l2j_1p2>;
+ vdda-pll-supply = <&vreg_l2d_0p9>;
+
+ status = "okay";
+@@ -972,7 +972,7 @@
};

- &smb2360_2_eusb2_repeater {
+ &usb_1_ss2_qmpphy {
+- vdda-phy-supply = <&vreg_l3e_1p2>;
++ vdda-phy-supply = <&vreg_l2j_1p2>;
+ vdda-pll-supply = <&vreg_l2d_0p9>;
+
+ status = "okay";
Index: sysutils/firmware/arm64-qcom-dtb/patches/patch-src_arm64_qcom_x1e80100-microsoft-romulus_dtsi
===================================================================
RCS file: sysutils/firmware/arm64-qcom-dtb/patches/patch-src_arm64_qcom_x1e80100-microsoft-romulus_dtsi
diff -N sysutils/firmware/arm64-qcom-dtb/patches/patch-src_arm64_qcom_x1e80100-microsoft-romulus_dtsi
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ sysutils/firmware/arm64-qcom-dtb/patches/patch-src_arm64_qcom_x1e80100-microsoft-romulus_dtsi 25 Jan 2025 12:51:42 -0000
@@ -0,0 +1,21 @@
+Index: src/arm64/qcom/x1e80100-microsoft-romulus.dtsi
+--- src/arm64/qcom/x1e80100-microsoft-romulus.dtsi.orig
++++ src/arm64/qcom/x1e80100-microsoft-romulus.dtsi
+@@ -823,7 +823,7 @@
+ };
+
+ &usb_1_ss0_qmpphy {
+- vdda-phy-supply = <&vreg_l3e>;
++ vdda-phy-supply = <&vreg_l2j>;
+ vdda-pll-supply = <&vreg_l1j>;
+
+ status = "okay";
+@@ -855,7 +855,7 @@
+ };
+
+ &usb_1_ss1_qmpphy {
+- vdda-phy-supply = <&vreg_l3e>;
++ vdda-phy-supply = <&vreg_l2j>;
+ vdda-pll-supply = <&vreg_l2d>;
+
+ status = "okay";
Index: sysutils/firmware/arm64-qcom-dtb/patches/patch-src_arm64_qcom_x1e80100-pmics_dtsi
===================================================================
RCS file: sysutils/firmware/arm64-qcom-dtb/patches/patch-src_arm64_qcom_x1e80100-pmics_dtsi
diff -N sysutils/firmware/arm64-qcom-dtb/patches/patch-src_arm64_qcom_x1e80100-pmics_dtsi
--- sysutils/firmware/arm64-qcom-dtb/patches/patch-src_arm64_qcom_x1e80100-pmics_dtsi 21 Sep 2024 17:14:17 -0000 1.2
+++ /dev/null 1 Jan 1970 00:00:00 -0000
@@ -1,27 +0,0 @@
-Index: src/arm64/qcom/x1e80100-pmics.dtsi
---- src/arm64/qcom/x1e80100-pmics.dtsi.orig
-+++ src/arm64/qcom/x1e80100-pmics.dtsi
-@@ -249,6 +249,14 @@
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-+
-+ pmk8550_pwm: pwm {
-+ compatible = "qcom,pmk8550-pwm";
-+
-+ #pwm-cells = <2>;
-+
-+ status = "disabled";
-+ };
- };
-
- /* PMC8380C */
-@@ -508,6 +516,8 @@
- reg = <0xb SPMI_USID>;
- #address-cells = <1>;
- #size-cells = <0>;
-+
-+ status = "disabled";
-
- smb2360_2_eusb2_repeater: phy@fd00 {
- compatible = "qcom,smb2360-eusb2-repeater";
Index: sysutils/firmware/arm64-qcom-dtb/patches/patch-src_arm64_qcom_x1e80100-qcp_dts
===================================================================
RCS file: sysutils/firmware/arm64-qcom-dtb/patches/patch-src_arm64_qcom_x1e80100-qcp_dts
diff -N sysutils/firmware/arm64-qcom-dtb/patches/patch-src_arm64_qcom_x1e80100-qcp_dts
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ sysutils/firmware/arm64-qcom-dtb/patches/patch-src_arm64_qcom_x1e80100-qcp_dts 25 Jan 2025 12:51:42 -0000
@@ -0,0 +1,204 @@
+Index: src/arm64/qcom/x1e80100-qcp.dts
+--- src/arm64/qcom/x1e80100-qcp.dts.orig
++++ src/arm64/qcom/x1e80100-qcp.dts
+@@ -17,6 +17,7 @@
+
+ aliases {
+ serial0 = &uart21;
++ serial1 = &uart14;
+ };
+
+ wcd938x: audio-codec {
+@@ -256,6 +257,101 @@
+
+ regulator-boot-on;
+ };
++
++ vreg_wcn_3p3: regulator-wcn-3p3 {
++ compatible = "regulator-fixed";
++
++ regulator-name = "VREG_WCN_3P3";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++
++ gpio = <&tlmm 214 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
++
++ pinctrl-0 = <&wcn_sw_en>;
++ pinctrl-names = "default";
++
++ regulator-boot-on;
++ };
++
++ vreg_wcn_0p95: regulator-wcn-0p95 {
++ compatible = "regulator-fixed";
++
++ regulator-name = "VREG_WCN_0P95";
++ regulator-min-microvolt = <950000>;
++ regulator-max-microvolt = <950000>;
++
++ vin-supply = <&vreg_wcn_3p3>;
++ };
++
++ vreg_wcn_1p9: regulator-wcn-1p9 {
++ compatible = "regulator-fixed";
++
++ regulator-name = "VREG_WCN_1P9";
++ regulator-min-microvolt = <1900000>;
++ regulator-max-microvolt = <1900000>;
++
++ vin-supply = <&vreg_wcn_3p3>;
++ };
++
++ wcn7850-pmu {
++ compatible = "qcom,wcn7850-pmu";
++
++ vdd-supply = <&vreg_wcn_0p95>;
++ vddio-supply = <&vreg_l15b_1p8>;
++ vddaon-supply = <&vreg_wcn_0p95>;
++ vdddig-supply = <&vreg_wcn_0p95>;
++ vddrfa1p2-supply = <&vreg_wcn_1p9>;
++ vddrfa1p8-supply = <&vreg_wcn_1p9>;
++
++ wlan-enable-gpios = <&tlmm 117 GPIO_ACTIVE_HIGH>;
++ bt-enable-gpios = <&tlmm 116 GPIO_ACTIVE_HIGH>;
++
++ pinctrl-0 = <&wcn_wlan_bt_en>;
++ pinctrl-names = "default";
++
++ regulators {
++ vreg_pmu_rfa_cmn: ldo0 {
++ regulator-name = "vreg_pmu_rfa_cmn";
++ };
++
++ vreg_pmu_aon_0p59: ldo1 {
++ regulator-name = "vreg_pmu_aon_0p59";
++ };
++
++ vreg_pmu_wlcx_0p8: ldo2 {
++ regulator-name = "vreg_pmu_wlcx_0p8";
++ };
++
++ vreg_pmu_wlmx_0p85: ldo3 {
++ regulator-name = "vreg_pmu_wlmx_0p85";
++ };
++
++ vreg_pmu_btcmx_0p85: ldo4 {
++ regulator-name = "vreg_pmu_btcmx_0p85";
++ };
++
++ vreg_pmu_rfa_0p8: ldo5 {
++ regulator-name = "vreg_pmu_rfa_0p8";
++ };
++
++ vreg_pmu_rfa_1p2: ldo6 {
++ regulator-name = "vreg_pmu_rfa_1p2";
++ };
++
++ vreg_pmu_rfa_1p8: ldo7 {
++ regulator-name = "vreg_pmu_rfa_1p8";
++ };
++
++ vreg_pmu_pcie_0p9: ldo8 {
++ regulator-name = "vreg_pmu_pcie_0p9";
++ };
++
++ vreg_pmu_pcie_1p8: ldo9 {
++ regulator-name = "vreg_pmu_pcie_1p8";
++ };
++ };
++ };
+ };
+
+ &apps_rsc {
+@@ -686,6 +782,23 @@
+ status = "okay";
+ };
+
++&pcie4_port0 {
++ wifi@0 {
++ compatible = "pci17cb,1107";
++ reg = <0x10000 0x0 0x0 0x0 0x0>;
++
++ vddaon-supply = <&vreg_pmu_aon_0p59>;
++ vddwlcx-supply = <&vreg_pmu_wlcx_0p8>;
++ vddwlmx-supply = <&vreg_pmu_wlmx_0p85>;
++ vddrfacmn-supply = <&vreg_pmu_rfa_cmn>;
++ vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
++ vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
++ vddrfa1p8-supply = <&vreg_pmu_rfa_1p8>;
++ vddpcie0p9-supply = <&vreg_pmu_pcie_0p9>;
++ vddpcie1p8-supply = <&vreg_pmu_pcie_1p8>;
++ };
++};
++
+ &pcie6a {
+ perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
+ wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
+@@ -879,8 +992,39 @@
+ bias-disable;
+ output-low;
+ };
++
++ wcn_wlan_bt_en: wcn-wlan-bt-en-state {
++ pins = "gpio116", "gpio117";
++ function = "gpio";
++ drive-strength = <2>;
++ bias-disable;
++ };
++
++ wcn_sw_en: wcn-sw-en-state {
++ pins = "gpio214";
++ function = "gpio";
++ drive-strength = <2>;
++ bias-disable;
++ };
+ };
+
++&uart14 {
++ status = "okay";
++
++ bluetooth {
++ compatible = "qcom,wcn7850-bt";
++ max-speed = <3200000>;
++
++ vddaon-supply = <&vreg_pmu_aon_0p59>;
++ vddwlcx-supply = <&vreg_pmu_wlcx_0p8>;
++ vddwlmx-supply = <&vreg_pmu_wlmx_0p85>;
++ vddrfacmn-supply = <&vreg_pmu_rfa_cmn>;
++ vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
++ vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
++ vddrfa1p8-supply = <&vreg_pmu_rfa_1p8>;
++ };
++};
++
+ &uart21 {
+ compatible = "qcom,geni-debug-uart";
+ status = "okay";
+@@ -896,7 +1040,7 @@
+ };
+
+ &usb_1_ss0_qmpphy {
+- vdda-phy-supply = <&vreg_l3e_1p2>;
++ vdda-phy-supply = <&vreg_l2j_1p2>;
+ vdda-pll-supply = <&vreg_l1j_0p8>;
+
+ status = "okay";
+@@ -928,7 +1072,7 @@
+ };
+
+ &usb_1_ss1_qmpphy {
+- vdda-phy-supply = <&vreg_l3e_1p2>;
++ vdda-phy-supply = <&vreg_l2j_1p2>;
+ vdda-pll-supply = <&vreg_l2d_0p9>;
+
+ status = "okay";
+@@ -960,7 +1104,7 @@
+ };
+
+ &usb_1_ss2_qmpphy {
+- vdda-phy-supply = <&vreg_l3e_1p2>;
++ vdda-phy-supply = <&vreg_l2j_1p2>;
+ vdda-pll-supply = <&vreg_l2d_0p9>;
+
+ status = "okay";
Index: sysutils/firmware/arm64-qcom-dtb/patches/patch-src_arm64_qcom_x1e80100_dtsi
===================================================================
RCS file: /cvs/ports/sysutils/firmware/arm64-qcom-dtb/patches/patch-src_arm64_qcom_x1e80100_dtsi,v
diff -u -p -r1.3 patch-src_arm64_qcom_x1e80100_dtsi
--- sysutils/firmware/arm64-qcom-dtb/patches/patch-src_arm64_qcom_x1e80100_dtsi 17 Nov 2024 16:45:15 -0000 1.3
+++ sysutils/firmware/arm64-qcom-dtb/patches/patch-src_arm64_qcom_x1e80100_dtsi 25 Jan 2025 12:51:42 -0000
@@ -1,149 +1,141 @@
Index: src/arm64/qcom/x1e80100.dtsi
--- src/arm64/qcom/x1e80100.dtsi.orig
+++ src/arm64/qcom/x1e80100.dtsi
-@@ -4,6 +4,7 @@
- */
-
- #include <dt-bindings/clock/qcom,rpmh.h>
-+#include <dt-bindings/clock/qcom,sc8280xp-lpasscc.h>
- #include <dt-bindings/clock/qcom,x1e80100-dispcc.h>
- #include <dt-bindings/clock/qcom,x1e80100-gcc.h>
- #include <dt-bindings/clock/qcom,x1e80100-gpucc.h>
-@@ -70,8 +71,8 @@
+@@ -71,8 +71,8 @@
reg = <0x0 0x0>;
enable-method = "psci";
- next-level-cache = <&L2_0>;
-- power-domains = <&CPU_PD0>;
+ next-level-cache = <&l2_0>;
+- power-domains = <&cpu_pd0>;
- power-domain-names = "psci";
-+ power-domains = <&CPU_PD0>, <&scmi_dvfs 0>;
++ power-domains = <&cpu_pd0>, <&scmi_dvfs 0>;
+ power-domain-names = "psci", "perf";
- cpu-idle-states = <&CLUSTER_C4>;
+ cpu-idle-states = <&cluster_c4>;

- L2_0: l2-cache {
-@@ -87,8 +88,8 @@
+ l2_0: l2-cache {
+@@ -88,8 +88,8 @@
reg = <0x0 0x100>;
enable-method = "psci";
- next-level-cache = <&L2_0>;
-- power-domains = <&CPU_PD1>;
+ next-level-cache = <&l2_0>;
+- power-domains = <&cpu_pd1>;
- power-domain-names = "psci";
-+ power-domains = <&CPU_PD1>, <&scmi_dvfs 0>;
++ power-domains = <&cpu_pd1>, <&scmi_dvfs 0>;
+ power-domain-names = "psci", "perf";
- cpu-idle-states = <&CLUSTER_C4>;
+ cpu-idle-states = <&cluster_c4>;
};

-@@ -98,8 +99,8 @@
+@@ -99,8 +99,8 @@
reg = <0x0 0x200>;
enable-method = "psci";
- next-level-cache = <&L2_0>;
-- power-domains = <&CPU_PD2>;
+ next-level-cache = <&l2_0>;
+- power-domains = <&cpu_pd2>;
- power-domain-names = "psci";
-+ power-domains = <&CPU_PD2>, <&scmi_dvfs 0>;
++ power-domains = <&cpu_pd2>, <&scmi_dvfs 0>;
+ power-domain-names = "psci", "perf";
- cpu-idle-states = <&CLUSTER_C4>;
+ cpu-idle-states = <&cluster_c4>;
};

-@@ -109,8 +110,8 @@
+@@ -110,8 +110,8 @@
reg = <0x0 0x300>;
enable-method = "psci";
- next-level-cache = <&L2_0>;
-- power-domains = <&CPU_PD3>;
+ next-level-cache = <&l2_0>;
+- power-domains = <&cpu_pd3>;
- power-domain-names = "psci";
-+ power-domains = <&CPU_PD3>, <&scmi_dvfs 0>;
++ power-domains = <&cpu_pd3>, <&scmi_dvfs 0>;
+ power-domain-names = "psci", "perf";
- cpu-idle-states = <&CLUSTER_C4>;
+ cpu-idle-states = <&cluster_c4>;
};

-@@ -120,8 +121,8 @@
+@@ -121,8 +121,8 @@
reg = <0x0 0x10000>;
enable-method = "psci";
- next-level-cache = <&L2_1>;
-- power-domains = <&CPU_PD4>;
+ next-level-cache = <&l2_1>;
+- power-domains = <&cpu_pd4>;
- power-domain-names = "psci";
-+ power-domains = <&CPU_PD4>, <&scmi_dvfs 1>;
++ power-domains = <&cpu_pd4>, <&scmi_dvfs 1>;
+ power-domain-names = "psci", "perf";
- cpu-idle-states = <&CLUSTER_C4>;
+ cpu-idle-states = <&cluster_c4>;

- L2_1: l2-cache {
-@@ -137,8 +138,8 @@
+ l2_1: l2-cache {
+@@ -138,8 +138,8 @@
reg = <0x0 0x10100>;
enable-method = "psci";
- next-level-cache = <&L2_1>;
-- power-domains = <&CPU_PD5>;
+ next-level-cache = <&l2_1>;
+- power-domains = <&cpu_pd5>;
- power-domain-names = "psci";
-+ power-domains = <&CPU_PD5>, <&scmi_dvfs 1>;
++ power-domains = <&cpu_pd5>, <&scmi_dvfs 1>;
+ power-domain-names = "psci", "perf";
- cpu-idle-states = <&CLUSTER_C4>;
+ cpu-idle-states = <&cluster_c4>;
};

-@@ -148,8 +149,8 @@
+@@ -149,8 +149,8 @@
reg = <0x0 0x10200>;
enable-method = "psci";
- next-level-cache = <&L2_1>;
-- power-domains = <&CPU_PD6>;
+ next-level-cache = <&l2_1>;
+- power-domains = <&cpu_pd6>;
- power-domain-names = "psci";
-+ power-domains = <&CPU_PD6>, <&scmi_dvfs 1>;
++ power-domains = <&cpu_pd6>, <&scmi_dvfs 1>;
+ power-domain-names = "psci", "perf";
- cpu-idle-states = <&CLUSTER_C4>;
+ cpu-idle-states = <&cluster_c4>;
};

-@@ -159,8 +160,8 @@
+@@ -160,8 +160,8 @@
reg = <0x0 0x10300>;
enable-method = "psci";
- next-level-cache = <&L2_1>;
-- power-domains = <&CPU_PD7>;
+ next-level-cache = <&l2_1>;
+- power-domains = <&cpu_pd7>;
- power-domain-names = "psci";
-+ power-domains = <&CPU_PD7>, <&scmi_dvfs 1>;
++ power-domains = <&cpu_pd7>, <&scmi_dvfs 1>;
+ power-domain-names = "psci", "perf";
- cpu-idle-states = <&CLUSTER_C4>;
+ cpu-idle-states = <&cluster_c4>;
};

-@@ -170,8 +171,8 @@
+@@ -171,8 +171,8 @@
reg = <0x0 0x20000>;
enable-method = "psci";
- next-level-cache = <&L2_2>;
-- power-domains = <&CPU_PD8>;
+ next-level-cache = <&l2_2>;
+- power-domains = <&cpu_pd8>;
- power-domain-names = "psci";
-+ power-domains = <&CPU_PD8>, <&scmi_dvfs 2>;
++ power-domains = <&cpu_pd8>, <&scmi_dvfs 2>;
+ power-domain-names = "psci", "perf";
- cpu-idle-states = <&CLUSTER_C4>;
+ cpu-idle-states = <&cluster_c4>;

- L2_2: l2-cache {
-@@ -187,8 +188,8 @@
+ l2_2: l2-cache {
+@@ -188,8 +188,8 @@
reg = <0x0 0x20100>;
enable-method = "psci";
- next-level-cache = <&L2_2>;
-- power-domains = <&CPU_PD9>;
+ next-level-cache = <&l2_2>;
+- power-domains = <&cpu_pd9>;
- power-domain-names = "psci";
-+ power-domains = <&CPU_PD9>, <&scmi_dvfs 2>;
++ power-domains = <&cpu_pd9>, <&scmi_dvfs 2>;
+ power-domain-names = "psci", "perf";
- cpu-idle-states = <&CLUSTER_C4>;
+ cpu-idle-states = <&cluster_c4>;
};

-@@ -198,8 +199,8 @@
+@@ -199,8 +199,8 @@
reg = <0x0 0x20200>;
enable-method = "psci";
- next-level-cache = <&L2_2>;
-- power-domains = <&CPU_PD10>;
+ next-level-cache = <&l2_2>;
+- power-domains = <&cpu_pd10>;
- power-domain-names = "psci";
-+ power-domains = <&CPU_PD10>, <&scmi_dvfs 2>;
++ power-domains = <&cpu_pd10>, <&scmi_dvfs 2>;
+ power-domain-names = "psci", "perf";
- cpu-idle-states = <&CLUSTER_C4>;
+ cpu-idle-states = <&cluster_c4>;
};

-@@ -209,8 +210,8 @@
+@@ -210,8 +210,8 @@
reg = <0x0 0x20300>;
enable-method = "psci";
- next-level-cache = <&L2_2>;
-- power-domains = <&CPU_PD11>;
+ next-level-cache = <&l2_2>;
+- power-domains = <&cpu_pd11>;
- power-domain-names = "psci";
-+ power-domains = <&CPU_PD11>, <&scmi_dvfs 2>;
++ power-domains = <&cpu_pd11>, <&scmi_dvfs 2>;
+ power-domain-names = "psci", "perf";
- cpu-idle-states = <&CLUSTER_C4>;
+ cpu-idle-states = <&cluster_c4>;
};

-@@ -310,6 +311,21 @@
- interconnects = <&aggre2_noc MASTER_CRYPTO QCOM_ICC_TAG_ALWAYS
+@@ -310,6 +310,21 @@
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
+ qcom,dload-mode = <&tcsr 0x19000>;
};
+
+ scmi {
@@ -163,193 +155,575 @@ Index: src/arm64/qcom/x1e80100.dtsi
};

clk_virt: interconnect-0 {
-@@ -745,7 +761,7 @@
- <&sleep_clk>,
- <0>,
- <&pcie4_phy>,
-- <0>,
-+ <&pcie5_phy>,
- <&pcie6a_phy>,
- <0>,
- <&usb_1_ss0_qmpphy QMP_USB43DP_USB3_PIPE_CLK>,
-@@ -1979,7 +1995,7 @@
-
- i2c0: i2c@b80000 {
- compatible = "qcom,geni-i2c";
-- reg = <0 0xb80000 0 0x4000>;
-+ reg = <0 0x00b80000 0 0x4000>;
-
- interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
+@@ -677,6 +692,34 @@
+ };
+ };

-@@ -2142,9 +2158,31 @@
++ qup_opp_table_100mhz: opp-table-qup100mhz {
++ compatible = "operating-points-v2";
++
++ opp-75000000 {
++ opp-hz = /bits/ 64 <75000000>;
++ required-opps = <&rpmhpd_opp_low_svs>;
++ };
++
++ opp-100000000 {
++ opp-hz = /bits/ 64 <100000000>;
++ required-opps = <&rpmhpd_opp_svs>;
++ };
++ };
++
++ qup_opp_table_120mhz: opp-table-qup120mhz {
++ compatible = "operating-points-v2";
++
++ opp-75000000 {
++ opp-hz = /bits/ 64 <75000000>;
++ required-opps = <&rpmhpd_opp_low_svs>;
++ };
++
++ opp-120000000 {
++ opp-hz = /bits/ 64 <120000000>;
++ required-opps = <&rpmhpd_opp_svs>;
++ };
++ };
++
+ smp2p-adsp {
+ compatible = "qcom,smp2p";
+
+@@ -831,6 +874,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ required-opps = <&rpmhpd_opp_low_svs>;
++
+ dmas = <&gpi_dma2 0 0 QCOM_GPI_I2C>,
+ <&gpi_dma2 1 0 QCOM_GPI_I2C>;
+ dma-names = "tx",
+@@ -864,6 +910,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ operating-points-v2 = <&qup_opp_table_120mhz>;
++
+ dmas = <&gpi_dma2 0 0 QCOM_GPI_SPI>,
+ <&gpi_dma2 1 0 QCOM_GPI_SPI>;
+ dma-names = "tx",
+@@ -897,6 +946,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ required-opps = <&rpmhpd_opp_low_svs>;
++
+ dmas = <&gpi_dma2 0 1 QCOM_GPI_I2C>,
+ <&gpi_dma2 1 1 QCOM_GPI_I2C>;
+ dma-names = "tx",
+@@ -930,6 +982,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ operating-points-v2 = <&qup_opp_table_120mhz>;
++
+ dmas = <&gpi_dma2 0 1 QCOM_GPI_SPI>,
+ <&gpi_dma2 1 1 QCOM_GPI_SPI>;
+ dma-names = "tx",
+@@ -963,6 +1018,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ required-opps = <&rpmhpd_opp_low_svs>;
++
+ dmas = <&gpi_dma2 0 2 QCOM_GPI_I2C>,
+ <&gpi_dma2 1 2 QCOM_GPI_I2C>;
+ dma-names = "tx",
+@@ -996,6 +1054,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ operating-points-v2 = <&qup_opp_table_100mhz>;
++
+ dmas = <&gpi_dma2 0 2 QCOM_GPI_SPI>,
+ <&gpi_dma2 1 2 QCOM_GPI_SPI>;
+ dma-names = "tx",
+@@ -1029,6 +1090,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ required-opps = <&rpmhpd_opp_low_svs>;
++
+ dmas = <&gpi_dma2 0 3 QCOM_GPI_I2C>,
+ <&gpi_dma2 1 3 QCOM_GPI_I2C>;
+ dma-names = "tx",
+@@ -1062,6 +1126,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ operating-points-v2 = <&qup_opp_table_100mhz>;
++
+ dmas = <&gpi_dma2 0 3 QCOM_GPI_SPI>,
+ <&gpi_dma2 1 3 QCOM_GPI_SPI>;
+ dma-names = "tx",
+@@ -1095,6 +1162,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ required-opps = <&rpmhpd_opp_low_svs>;
++
+ dmas = <&gpi_dma2 0 4 QCOM_GPI_I2C>,
+ <&gpi_dma2 1 4 QCOM_GPI_I2C>;
+ dma-names = "tx",
+@@ -1128,6 +1198,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ operating-points-v2 = <&qup_opp_table_100mhz>;
++
+ dmas = <&gpi_dma2 0 4 QCOM_GPI_SPI>,
+ <&gpi_dma2 1 4 QCOM_GPI_SPI>;
+ dma-names = "tx",
+@@ -1161,6 +1234,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ required-opps = <&rpmhpd_opp_low_svs>;
++
+ dmas = <&gpi_dma2 0 5 QCOM_GPI_I2C>,
+ <&gpi_dma2 1 5 QCOM_GPI_I2C>;
+ dma-names = "tx",
+@@ -1194,6 +1270,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ operating-points-v2 = <&qup_opp_table_100mhz>;
++
+ dmas = <&gpi_dma2 0 5 QCOM_GPI_SPI>,
+ <&gpi_dma2 1 5 QCOM_GPI_SPI>;
+ dma-names = "tx",
+@@ -1224,6 +1303,9 @@
+ interconnect-names = "qup-core",
+ "qup-config";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ operating-points-v2 = <&qup_opp_table_100mhz>;
++
+ pinctrl-0 = <&qup_uart21_default>;
+ pinctrl-names = "default";
+
+@@ -1249,6 +1331,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ required-opps = <&rpmhpd_opp_low_svs>;
++
+ dmas = <&gpi_dma2 0 6 QCOM_GPI_I2C>,
+ <&gpi_dma2 1 6 QCOM_GPI_I2C>;
+ dma-names = "tx",
+@@ -1282,6 +1367,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ operating-points-v2 = <&qup_opp_table_100mhz>;
++
+ dmas = <&gpi_dma2 0 6 QCOM_GPI_SPI>,
+ <&gpi_dma2 1 6 QCOM_GPI_SPI>;
+ dma-names = "tx",
+@@ -1315,6 +1403,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ required-opps = <&rpmhpd_opp_low_svs>;
++
+ dmas = <&gpi_dma2 0 7 QCOM_GPI_I2C>,
+ <&gpi_dma2 1 7 QCOM_GPI_I2C>;
+ dma-names = "tx",
+@@ -1348,6 +1439,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ operating-points-v2 = <&qup_opp_table_100mhz>;
++
+ dmas = <&gpi_dma2 0 7 QCOM_GPI_SPI>,
+ <&gpi_dma2 1 7 QCOM_GPI_SPI>;
+ dma-names = "tx",
+@@ -1425,6 +1519,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ required-opps = <&rpmhpd_opp_low_svs>;
++
+ dmas = <&gpi_dma1 0 0 QCOM_GPI_I2C>,
+ <&gpi_dma1 1 0 QCOM_GPI_I2C>;
+ dma-names = "tx",
+@@ -1458,6 +1555,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ operating-points-v2 = <&qup_opp_table_120mhz>;
++
+ dmas = <&gpi_dma1 0 0 QCOM_GPI_SPI>,
+ <&gpi_dma1 1 0 QCOM_GPI_SPI>;
+ dma-names = "tx",
+@@ -1491,6 +1591,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ required-opps = <&rpmhpd_opp_low_svs>;
++
+ dmas = <&gpi_dma1 0 1 QCOM_GPI_I2C>,
+ <&gpi_dma1 1 1 QCOM_GPI_I2C>;
+ dma-names = "tx",
+@@ -1524,6 +1627,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ operating-points-v2 = <&qup_opp_table_120mhz>;
++
+ dmas = <&gpi_dma1 0 1 QCOM_GPI_SPI>,
+ <&gpi_dma1 1 1 QCOM_GPI_SPI>;
+ dma-names = "tx",
+@@ -1557,6 +1663,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ required-opps = <&rpmhpd_opp_low_svs>;
++
+ dmas = <&gpi_dma1 0 2 QCOM_GPI_I2C>,
+ <&gpi_dma1 1 2 QCOM_GPI_I2C>;
+ dma-names = "tx",
+@@ -1590,6 +1699,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ operating-points-v2 = <&qup_opp_table_100mhz>;
++
+ dmas = <&gpi_dma1 0 2 QCOM_GPI_SPI>,
+ <&gpi_dma1 1 2 QCOM_GPI_SPI>;
+ dma-names = "tx",
+@@ -1623,6 +1735,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ required-opps = <&rpmhpd_opp_low_svs>;
++
+ dmas = <&gpi_dma1 0 3 QCOM_GPI_I2C>,
+ <&gpi_dma1 1 3 QCOM_GPI_I2C>;
+ dma-names = "tx",
+@@ -1656,6 +1771,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ operating-points-v2 = <&qup_opp_table_100mhz>;
++
+ dmas = <&gpi_dma1 0 3 QCOM_GPI_SPI>,
+ <&gpi_dma1 1 3 QCOM_GPI_SPI>;
+ dma-names = "tx",
+@@ -1689,6 +1807,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ required-opps = <&rpmhpd_opp_low_svs>;
++
+ dmas = <&gpi_dma1 0 4 QCOM_GPI_I2C>,
+ <&gpi_dma1 1 4 QCOM_GPI_I2C>;
+ dma-names = "tx",
+@@ -1722,6 +1843,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ operating-points-v2 = <&qup_opp_table_100mhz>;
++
+ dmas = <&gpi_dma1 0 4 QCOM_GPI_SPI>,
+ <&gpi_dma1 1 4 QCOM_GPI_SPI>;
+ dma-names = "tx",
+@@ -1755,6 +1879,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ required-opps = <&rpmhpd_opp_low_svs>;
++
+ dmas = <&gpi_dma1 0 5 QCOM_GPI_I2C>,
+ <&gpi_dma1 1 5 QCOM_GPI_I2C>;
+ dma-names = "tx",
+@@ -1788,6 +1915,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ operating-points-v2 = <&qup_opp_table_100mhz>;
++
+ dmas = <&gpi_dma1 0 5 QCOM_GPI_SPI>,
+ <&gpi_dma1 1 5 QCOM_GPI_SPI>;
+ dma-names = "tx",
+@@ -1821,6 +1951,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ required-opps = <&rpmhpd_opp_low_svs>;
++
+ dmas = <&gpi_dma1 0 6 QCOM_GPI_I2C>,
+ <&gpi_dma1 1 6 QCOM_GPI_I2C>;
+ dma-names = "tx",
+@@ -1854,6 +1987,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ operating-points-v2 = <&qup_opp_table_100mhz>;
++
+ dmas = <&gpi_dma1 0 6 QCOM_GPI_SPI>,
+ <&gpi_dma1 1 6 QCOM_GPI_SPI>;
+ dma-names = "tx",
+@@ -1868,6 +2004,31 @@
status = "disabled";
};

-+ uart2: serial@b88000 {
++ uart14: serial@a98000 {
+ compatible = "qcom,geni-uart";
-+ reg = <0 0x00b88000 0 0x4000>;
++ reg = <0 0x00a98000 0 0x4000>;
+
-+ interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>;
++ interrupts = <GIC_SPI 806 IRQ_TYPE_LEVEL_HIGH>;
+
-+ clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>;
++ clocks = <&gcc GCC_QUPV3_WRAP1_S6_CLK>;
+ clock-names = "se";
+
-+ interconnects = <&clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS
-+ &clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS>,
++ interconnects = <&clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS
++ &clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS>,
+ <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-+ &config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS>;
++ &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS>;
+ interconnect-names = "qup-core",
+ "qup-config";
+
-+ pinctrl-0 = <&qup_uart2_default>;
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ operating-points-v2 = <&qup_opp_table_100mhz>;
++
++ pinctrl-0 = <&qup_uart14_default>;
+ pinctrl-names = "default";
+
+ status = "disabled";
+ };
+
- spi2: spi@b88000 {
- compatible = "qcom,geni-spi";
-- reg = <0 0xb88000 0 0x4000>;
-+ reg = <0 0x00b88000 0 0x4000>;
-
- interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>;
-
-@@ -2243,7 +2281,7 @@
-
- i2c4: i2c@b90000 {
+ i2c15: i2c@a9c000 {
compatible = "qcom,geni-i2c";
-- reg = <0 0xb90000 0 0x4000>;
-+ reg = <0 0x00b90000 0 0x4000>;
-
- interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>;
-
-@@ -2603,6 +2641,8 @@
- #clock-cells = <1>;
- #phy-cells = <1>;
-
-+ orientation-switch;
-+
+ reg = <0 0x00a9c000 0 0x4000>;
+@@ -1887,6 +2048,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ required-opps = <&rpmhpd_opp_low_svs>;
++
+ dmas = <&gpi_dma1 0 7 QCOM_GPI_I2C>,
+ <&gpi_dma1 1 7 QCOM_GPI_I2C>;
+ dma-names = "tx",
+@@ -1920,6 +2084,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ operating-points-v2 = <&qup_opp_table_100mhz>;
++
+ dmas = <&gpi_dma1 0 7 QCOM_GPI_SPI>,
+ <&gpi_dma1 1 7 QCOM_GPI_SPI>;
+ dma-names = "tx",
+@@ -1996,6 +2163,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ required-opps = <&rpmhpd_opp_low_svs>;
++
+ dmas = <&gpi_dma0 0 0 QCOM_GPI_I2C>,
+ <&gpi_dma0 1 0 QCOM_GPI_I2C>;
+ dma-names = "tx",
+@@ -2029,6 +2199,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ operating-points-v2 = <&qup_opp_table_120mhz>;
++
+ dmas = <&gpi_dma0 0 0 QCOM_GPI_SPI>,
+ <&gpi_dma0 1 0 QCOM_GPI_SPI>;
+ dma-names = "tx",
+@@ -2062,6 +2235,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ required-opps = <&rpmhpd_opp_low_svs>;
++
+ dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>,
+ <&gpi_dma0 1 1 QCOM_GPI_I2C>;
+ dma-names = "tx",
+@@ -2095,6 +2271,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ operating-points-v2 = <&qup_opp_table_120mhz>;
++
+ dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>,
+ <&gpi_dma0 1 1 QCOM_GPI_SPI>;
+ dma-names = "tx",
+@@ -2128,6 +2307,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ required-opps = <&rpmhpd_opp_low_svs>;
++
+ dmas = <&gpi_dma0 0 2 QCOM_GPI_I2C>,
+ <&gpi_dma0 1 2 QCOM_GPI_I2C>;
+ dma-names = "tx",
+@@ -2158,6 +2340,9 @@
+ interconnect-names = "qup-core",
+ "qup-config";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ operating-points-v2 = <&qup_opp_table_100mhz>;
++
+ pinctrl-0 = <&qup_uart2_default>;
+ pinctrl-names = "default";
+
+@@ -2183,6 +2368,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ operating-points-v2 = <&qup_opp_table_100mhz>;
++
+ dmas = <&gpi_dma0 0 2 QCOM_GPI_SPI>,
+ <&gpi_dma0 1 2 QCOM_GPI_SPI>;
+ dma-names = "tx",
+@@ -2216,6 +2404,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ required-opps = <&rpmhpd_opp_low_svs>;
++
+ dmas = <&gpi_dma0 0 3 QCOM_GPI_I2C>,
+ <&gpi_dma0 1 3 QCOM_GPI_I2C>;
+ dma-names = "tx",
+@@ -2249,6 +2440,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ operating-points-v2 = <&qup_opp_table_100mhz>;
++
+ dmas = <&gpi_dma0 0 3 QCOM_GPI_SPI>,
+ <&gpi_dma0 1 3 QCOM_GPI_SPI>;
+ dma-names = "tx",
+@@ -2282,6 +2476,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ required-opps = <&rpmhpd_opp_low_svs>;
++
+ dmas = <&gpi_dma0 0 4 QCOM_GPI_I2C>,
+ <&gpi_dma0 1 4 QCOM_GPI_I2C>;
+ dma-names = "tx",
+@@ -2315,6 +2512,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ operating-points-v2 = <&qup_opp_table_100mhz>;
++
+ dmas = <&gpi_dma0 0 4 QCOM_GPI_SPI>,
+ <&gpi_dma0 1 4 QCOM_GPI_SPI>;
+ dma-names = "tx",
+@@ -2348,6 +2548,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ required-opps = <&rpmhpd_opp_low_svs>;
++
+ dmas = <&gpi_dma0 0 5 QCOM_GPI_I2C>,
+ <&gpi_dma0 1 5 QCOM_GPI_I2C>;
+ dma-names = "tx",
+@@ -2381,6 +2584,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ operating-points-v2 = <&qup_opp_table_100mhz>;
++
+ dmas = <&gpi_dma0 0 5 QCOM_GPI_SPI>,
+ <&gpi_dma0 1 5 QCOM_GPI_SPI>;
+ dma-names = "tx",
+@@ -2414,6 +2620,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ required-opps = <&rpmhpd_opp_low_svs>;
++
+ dmas = <&gpi_dma0 0 6 QCOM_GPI_I2C>,
+ <&gpi_dma0 1 6 QCOM_GPI_I2C>;
+ dma-names = "tx",
+@@ -2447,6 +2656,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ operating-points-v2 = <&qup_opp_table_100mhz>;
++
+ dmas = <&gpi_dma0 0 6 QCOM_GPI_SPI>,
+ <&gpi_dma0 1 6 QCOM_GPI_SPI>;
+ dma-names = "tx",
+@@ -2480,6 +2692,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ required-opps = <&rpmhpd_opp_low_svs>;
++
+ dmas = <&gpi_dma0 0 7 QCOM_GPI_I2C>,
+ <&gpi_dma0 1 7 QCOM_GPI_I2C>;
+ dma-names = "tx",
+@@ -2513,6 +2728,9 @@
+ "qup-config",
+ "qup-memory";
+
++ power-domains = <&rpmhpd RPMHPD_CX>;
++ operating-points-v2 = <&qup_opp_table_100mhz>;
++
+ dmas = <&gpi_dma0 0 7 QCOM_GPI_SPI>,
+ <&gpi_dma0 1 7 QCOM_GPI_SPI>;
+ dma-names = "tx",
+@@ -3291,6 +3509,77 @@
status = "disabled";
-
- ports {
-@@ -2671,6 +2711,8 @@
- #clock-cells = <1>;
- #phy-cells = <1>;
-
-+ orientation-switch;
-+
- status = "disabled";
-
- ports {
-@@ -2739,6 +2781,8 @@
- #clock-cells = <1>;
- #phy-cells = <1>;
-
-+ orientation-switch;
-+
- status = "disabled";
-
- ports {
-@@ -2772,7 +2816,7 @@
-
- cnoc_main: interconnect@1500000 {
- compatible = "qcom,x1e80100-cnoc-main";
-- reg = <0 0x1500000 0 0x14400>;
-+ reg = <0 0x01500000 0 0x14400>;
-
- qcom,bcm-voters = <&apps_bcm_voter>;
-
-@@ -2781,7 +2825,7 @@
-
- config_noc: interconnect@1600000 {
- compatible = "qcom,x1e80100-cnoc-cfg";
-- reg = <0 0x1600000 0 0x6600>;
-+ reg = <0 0x01600000 0 0x6600>;
-
- qcom,bcm-voters = <&apps_bcm_voter>;
-
-@@ -2790,7 +2834,7 @@
-
- system_noc: interconnect@1680000 {
- compatible = "qcom,x1e80100-system-noc";
-- reg = <0 0x1680000 0 0x1c080>;
-+ reg = <0 0x01680000 0 0x1c080>;
-
- qcom,bcm-voters = <&apps_bcm_voter>;
-
-@@ -2799,7 +2843,7 @@
-
- pcie_south_anoc: interconnect@16c0000 {
- compatible = "qcom,x1e80100-pcie-south-anoc";
-- reg = <0 0x16c0000 0 0xd080>;
-+ reg = <0 0x016c0000 0 0xd080>;
-
- qcom,bcm-voters = <&apps_bcm_voter>;
-
-@@ -2808,7 +2852,7 @@
-
- pcie_center_anoc: interconnect@16d0000 {
- compatible = "qcom,x1e80100-pcie-center-anoc";
-- reg = <0 0x16d0000 0 0x7000>;
-+ reg = <0 0x016d0000 0 0x7000>;
-
- qcom,bcm-voters = <&apps_bcm_voter>;
-
-@@ -2817,7 +2861,7 @@
-
- aggre1_noc: interconnect@16e0000 {
- compatible = "qcom,x1e80100-aggre1-noc";
-- reg = <0 0x16E0000 0 0x14400>;
-+ reg = <0 0x016e0000 0 0x14400>;
-
- qcom,bcm-voters = <&apps_bcm_voter>;
-
-@@ -2826,7 +2870,7 @@
-
- aggre2_noc: interconnect@1700000 {
- compatible = "qcom,x1e80100-aggre2-noc";
-- reg = <0 0x1700000 0 0x1c400>;
-+ reg = <0 0x01700000 0 0x1c400>;
-
- qcom,bcm-voters = <&apps_bcm_voter>;
-
-@@ -2835,7 +2879,7 @@
-
- pcie_north_anoc: interconnect@1740000 {
- compatible = "qcom,x1e80100-pcie-north-anoc";
-- reg = <0 0x1740000 0 0x9080>;
-+ reg = <0 0x01740000 0 0x9080>;
-
- qcom,bcm-voters = <&apps_bcm_voter>;
-
-@@ -2844,7 +2888,7 @@
-
- usb_center_anoc: interconnect@1750000 {
- compatible = "qcom,x1e80100-usb-center-anoc";
-- reg = <0 0x1750000 0 0x8800>;
-+ reg = <0 0x01750000 0 0x8800>;
-
- qcom,bcm-voters = <&apps_bcm_voter>;
-
-@@ -2853,7 +2897,7 @@
-
- usb_north_anoc: interconnect@1760000 {
- compatible = "qcom,x1e80100-usb-north-anoc";
-- reg = <0 0x1760000 0 0x7080>;
-+ reg = <0 0x01760000 0 0x7080>;
-
- qcom,bcm-voters = <&apps_bcm_voter>;
-
-@@ -2862,16 +2906,87 @@
-
- usb_south_anoc: interconnect@1770000 {
- compatible = "qcom,x1e80100-usb-south-anoc";
-- reg = <0 0x1770000 0 0xf080>;
-+ reg = <0 0x01770000 0 0xf080>;
-
- qcom,bcm-voters = <&apps_bcm_voter>;
-
- #interconnect-cells = <2>;
};

+ ufs_mem_hc: ufshc@1d84000 {
@@ -423,585 +797,108 @@ Index: src/arm64/qcom/x1e80100.dtsi
+ clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>;
+ };
+
- mmss_noc: interconnect@1780000 {
- compatible = "qcom,x1e80100-mmss-noc";
-- reg = <0 0x1780000 0 0x5B800>;
-+ reg = <0 0x01780000 0 0x5B800>;
-
- qcom,bcm-voters = <&apps_bcm_voter>;
-
-@@ -3000,6 +3115,126 @@
- status = "disabled";
- };
+ tcsr_mutex: hwlock@1f40000 {
+ compatible = "qcom,tcsr-mutex";
+ reg = <0 0x01f40000 0 0x20000>;
+@@ -4063,6 +4352,8 @@
+ snps,dis_u2_susphy_quirk;
+ snps,dis_enblslpm_quirk;
+ snps,usb3_lpm_capable;
++ snps,dis-u1-entry-quirk;
++ snps,dis-u2-entry-quirk;
+
+ dma-coherent;
+
+@@ -4118,7 +4409,7 @@
+ <&gcc GCC_USB20_MASTER_CLK>;
+ assigned-clock-rates = <19200000>, <200000000>;
+
+- interrupts-extended = <&intc GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>,
++ interrupts-extended = <&intc GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>,
+ <&pdc 50 IRQ_TYPE_EDGE_BOTH>,
+ <&pdc 49 IRQ_TYPE_EDGE_BOTH>;
+ interrupt-names = "pwr_event",
+@@ -4144,12 +4435,16 @@
+ usb_2_dwc3: usb@a200000 {
+ compatible = "snps,dwc3";
+ reg = <0 0x0a200000 0 0xcd00>;
+- interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
++ interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>;
+ iommus = <&apps_smmu 0x14e0 0x0>;
+ phys = <&usb_2_hsphy>;
+ phy-names = "usb2-phy";
+ maximum-speed = "high-speed";
++ snps,dis-u1-entry-quirk;
++ snps,dis-u2-entry-quirk;

-+ pcie5: pci@1c00000 {
-+ device_type = "pci";
-+ compatible = "qcom,pcie-x1e80100";
-+ reg = <0 0x01c00000 0 0x3000>,
-+ <0 0x7e000000 0 0xf1d>,
-+ <0 0x7e000f40 0 0xa8>,
-+ <0 0x7e001000 0 0x1000>,
-+ <0 0x7e100000 0 0x100000>,
-+ <0 0x01c03000 0 0x1000>;
-+ reg-names = "parf",
-+ "dbi",
-+ "elbi",
-+ "atu",
-+ "config",
-+ "mhi";
-+ #address-cells = <3>;
-+ #size-cells = <2>;
-+ ranges = <0x01000000 0x0 0x00000000 0x0 0x7e200000 0x0 0x100000>,
-+ <0x02000000 0x0 0x7e300000 0x0 0x7e300000 0x0 0x1d00000>;
-+ bus-range = <0x00 0xff>;
-+
-+ dma-coherent;
-+
-+ linux,pci-domain = <5>;
-+ num-lanes = <2>;
-+
-+ interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
-+ <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
-+ <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
-+ <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
-+ <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
-+ <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
-+ <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>,
-+ <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
-+ interrupt-names = "msi0",
-+ "msi1",
-+ "msi2",
-+ "msi3",
-+ "msi4",
-+ "msi5",
-+ "msi6",
-+ "msi7";
-+
-+ #interrupt-cells = <1>;
-+ interrupt-map-mask = <0 0 0 0x7>;
-+ interrupt-map = <0 0 0 1 &intc 0 0 0 70 IRQ_TYPE_LEVEL_HIGH>,
-+ <0 0 0 2 &intc 0 0 0 71 IRQ_TYPE_LEVEL_HIGH>,
-+ <0 0 0 3 &intc 0 0 0 72 IRQ_TYPE_LEVEL_HIGH>,
-+ <0 0 0 4 &intc 0 0 0 73 IRQ_TYPE_LEVEL_HIGH>;
-+
-+ clocks = <&gcc GCC_PCIE_5_AUX_CLK>,
-+ <&gcc GCC_PCIE_5_CFG_AHB_CLK>,
-+ <&gcc GCC_PCIE_5_MSTR_AXI_CLK>,
-+ <&gcc GCC_PCIE_5_SLV_AXI_CLK>,
-+ <&gcc GCC_PCIE_5_SLV_Q2A_AXI_CLK>,
-+ <&gcc GCC_CFG_NOC_PCIE_ANOC_NORTH_AHB_CLK>,
-+ <&gcc GCC_CNOC_PCIE_NORTH_SF_AXI_CLK>;
-+ clock-names = "aux",
-+ "cfg",
-+ "bus_master",
-+ "bus_slave",
-+ "slave_q2a",
-+ "noc_aggr",
-+ "cnoc_sf_axi";
-+
-+ assigned-clocks = <&gcc GCC_PCIE_5_AUX_CLK>;
-+ assigned-clock-rates = <19200000>;
-+
-+ interconnects = <&pcie_south_anoc MASTER_PCIE_5 QCOM_ICC_TAG_ALWAYS
-+ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
-+ <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-+ &cnoc_main SLAVE_PCIE_5 QCOM_ICC_TAG_ALWAYS>;
-+ interconnect-names = "pcie-mem",
-+ "cpu-pcie";
-+
-+ resets = <&gcc GCC_PCIE_5_BCR>,
-+ <&gcc GCC_PCIE_5_LINK_DOWN_BCR>;
-+ reset-names = "pci",
-+ "link_down";
-+
-+ power-domains = <&gcc GCC_PCIE_5_GDSC>;
-+ required-opps = <&rpmhpd_opp_nom>;
-+
-+ phys = <&pcie5_phy>;
-+ phy-names = "pciephy";
-+
-+ status = "disabled";
-+ };
-+
-+ pcie5_phy: phy@1c06000 {
-+ compatible = "qcom,x1e80100-qmp-gen3x2-pcie-phy";
-+ reg = <0 0x01c06000 0 0x2000>;
-+
-+ clocks = <&gcc GCC_PCIE_5_AUX_CLK>,
-+ <&gcc GCC_PCIE_5_CFG_AHB_CLK>,
-+ <&rpmhcc RPMH_CXO_CLK>,
-+ <&gcc GCC_PCIE_5_PHY_RCHNG_CLK>,
-+ <&gcc GCC_PCIE_5_PIPE_CLK>;
-+ clock-names = "aux",
-+ "cfg_ahb",
-+ "ref",
-+ "rchng",
-+ "pipe";
-+
-+ resets = <&gcc GCC_PCIE_5_PHY_BCR>;
-+ reset-names = "phy";
-+
-+ assigned-clocks = <&gcc GCC_PCIE_5_PHY_RCHNG_CLK>;
-+ assigned-clock-rates = <100000000>;
-+
-+ power-domains = <&gcc GCC_PCIE_5_PHY_GDSC>;
-+
-+ #clock-cells = <0>;
-+ clock-output-names = "pcie5_pipe_clk";
-+
-+ #phy-cells = <0>;
-+
-+ status = "disabled";
-+ };
++ dma-coherent;
+
- pcie4: pci@1c08000 {
- device_type = "pci";
- compatible = "qcom,pcie-x1e80100";
-@@ -3350,7 +3585,7 @@
-
- nsp_noc: interconnect@320c0000 {
- compatible = "qcom,x1e80100-nsp-noc";
-- reg = <0 0x320C0000 0 0xE080>;
-+ reg = <0 0x320C0000 0 0xe080>;
-
- qcom,bcm-voters = <&apps_bcm_voter>;
-
-@@ -3385,6 +3620,8 @@
-
- pinctrl-0 = <&wsa2_swr_active>;
- pinctrl-names = "default";
-+ resets = <&lpass_audiocc LPASS_AUDIO_SWR_WSA2_CGCR>;
-+ reset-names = "swr_audio_cgcr";
-
- qcom,din-ports = <4>;
- qcom,dout-ports = <9>;
-@@ -3433,6 +3670,8 @@
- pinctrl-0 = <&rx_swr_active>;
- pinctrl-names = "default";
-
-+ resets = <&lpass_audiocc LPASS_AUDIO_SWR_RX_CGCR>;
-+ reset-names = "swr_audio_cgcr";
- qcom,din-ports = <1>;
- qcom,dout-ports = <11>;
-
-@@ -3497,6 +3736,8 @@
-
- pinctrl-0 = <&wsa_swr_active>;
- pinctrl-names = "default";
-+ resets = <&lpass_audiocc LPASS_AUDIO_SWR_WSA_CGCR>;
-+ reset-names = "swr_audio_cgcr";
-
- qcom,din-ports = <4>;
- qcom,dout-ports = <9>;
-@@ -3517,6 +3758,13 @@
- status = "disabled";
- };
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+@@ -4245,6 +4540,8 @@
+ snps,dis_u2_susphy_quirk;
+ snps,dis_enblslpm_quirk;
+ snps,usb3_lpm_capable;
++ snps,dis-u1-entry-quirk;
++ snps,dis-u2-entry-quirk;

-+ lpass_audiocc: clock-controller@6b6c000 {
-+ compatible = "qcom,x1e80100-lpassaudiocc", "qcom,sc8280xp-lpassaudiocc";
-+ reg = <0 0x06b6c000 0 0x1000>;
-+ #clock-cells = <1>;
-+ #reset-cells = <1>;
-+ };
-+
- swr2: soundwire@6d30000 {
- compatible = "qcom,soundwire-v2.0.0";
- reg = <0 0x06d30000 0 0x10000>;
-@@ -3526,6 +3774,8 @@
- <GIC_SPI 520 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "core", "wakeup";
- label = "TX";
-+ resets = <&lpasscc LPASS_AUDIO_SWR_TX_CGCR>;
-+ reset-names = "swr_audio_cgcr";
-
- pinctrl-0 = <&tx_swr_active>;
- pinctrl-names = "default";
-@@ -3682,9 +3932,16 @@
+ dma-coherent;
};
- };
-
-+ lpasscc: clock-controller@6ea0000 {
-+ compatible = "qcom,x1e80100-lpasscc", "qcom,sc8280xp-lpasscc";
-+ reg = <0 0x06ea0000 0 0x12000>;
-+ #clock-cells = <1>;
-+ #reset-cells = <1>;
-+ };
-+
- lpass_ag_noc: interconnect@7e40000 {
- compatible = "qcom,x1e80100-lpass-ag-noc";
-- reg = <0 0x7e40000 0 0xE080>;
-+ reg = <0 0x07e40000 0 0xe080>;
-
- qcom,bcm-voters = <&apps_bcm_voter>;
-
-@@ -3693,7 +3950,7 @@
-
- lpass_lpiaon_noc: interconnect@7400000 {
- compatible = "qcom,x1e80100-lpass-lpiaon-noc";
-- reg = <0 0x7400000 0 0x19080>;
-+ reg = <0 0x07400000 0 0x19080>;
-
- qcom,bcm-voters = <&apps_bcm_voter>;
+@@ -4316,6 +4613,8 @@
+ snps,dis_u2_susphy_quirk;
+ snps,dis_enblslpm_quirk;
+ snps,usb3_lpm_capable;
++ snps,dis-u1-entry-quirk;
++ snps,dis-u2-entry-quirk;
+
+ dma-coherent;
+
+@@ -4414,6 +4713,8 @@
+ snps,dis_u2_susphy_quirk;
+ snps,dis_enblslpm_quirk;
+ snps,usb3_lpm_capable;
++ snps,dis-u1-entry-quirk;
++ snps,dis-u2-entry-quirk;

-@@ -3702,7 +3959,7 @@
-
- lpass_lpicx_noc: interconnect@7430000 {
- compatible = "qcom,x1e80100-lpass-lpicx-noc";
-- reg = <0 0x7430000 0 0x3A200>;
-+ reg = <0 0x07430000 0 0x3A200>;
-
- qcom,bcm-voters = <&apps_bcm_voter>;
-
-@@ -3723,6 +3980,90 @@
- status = "disabled";
- };
-
-+ usb_mp_hsphy0: phy@88e1000 {
-+ compatible = "qcom,x1e80100-snps-eusb2-phy",
-+ "qcom,sm8550-snps-eusb2-phy";
-+ reg = <0 0x088e1000 0 0x154>;
-+ #phy-cells = <0>;
-+
-+ clocks = <&tcsr TCSR_USB3_MP0_CLKREF_EN>;
-+ clock-names = "ref";
-+
-+ resets = <&gcc GCC_QUSB2PHY_HS0_MP_BCR>;
-+
-+ status = "disabled";
-+ };
-+
-+ usb_mp_hsphy1: phy@88e2000 {
-+ compatible = "qcom,x1e80100-snps-eusb2-phy",
-+ "qcom,sm8550-snps-eusb2-phy";
-+ reg = <0 0x088e2000 0 0x154>;
-+ #phy-cells = <0>;
-+
-+ clocks = <&tcsr TCSR_USB3_MP1_CLKREF_EN>;
-+ clock-names = "ref";
-+
-+ resets = <&gcc GCC_QUSB2PHY_HS1_MP_BCR>;
-+
-+ status = "disabled";
-+ };
-+
-+ usb_mp_qmpphy0: phy@88e3000 {
-+ compatible = "qcom,x1e80100-qmp-usb3-uni-phy";
-+ reg = <0 0x088e3000 0 0x2000>;
-+
-+ clocks = <&gcc GCC_USB3_MP_PHY_AUX_CLK>,
-+ <&rpmhcc RPMH_CXO_CLK>,
-+ <&gcc GCC_USB3_MP_PHY_COM_AUX_CLK>,
-+ <&gcc GCC_USB3_MP_PHY_PIPE_0_CLK>;
-+ clock-names = "aux",
-+ "ref",
-+ "com_aux",
-+ "pipe";
-+
-+ resets = <&gcc GCC_USB3_UNIPHY_MP0_BCR>,
-+ <&gcc GCC_USB3UNIPHY_PHY_MP0_BCR>;
-+ reset-names = "phy",
-+ "phy_phy";
-+
-+ power-domains = <&gcc GCC_USB3_MP_SS0_PHY_GDSC>;
-+
-+ #clock-cells = <0>;
-+ clock-output-names = "usb_mp_phy0_pipe_clk";
-+
-+ #phy-cells = <0>;
-+
-+ status = "disabled";
-+ };
-+
-+ usb_mp_qmpphy1: phy@88e5000 {
-+ compatible = "qcom,x1e80100-qmp-usb3-uni-phy";
-+ reg = <0 0x088e5000 0 0x2000>;
-+
-+ clocks = <&gcc GCC_USB3_MP_PHY_AUX_CLK>,
-+ <&rpmhcc RPMH_CXO_CLK>,
-+ <&gcc GCC_USB3_MP_PHY_COM_AUX_CLK>,
-+ <&gcc GCC_USB3_MP_PHY_PIPE_1_CLK>;
-+ clock-names = "aux",
-+ "ref",
-+ "com_aux",
-+ "pipe";
-+
-+ resets = <&gcc GCC_USB3_UNIPHY_MP1_BCR>,
-+ <&gcc GCC_USB3UNIPHY_PHY_MP1_BCR>;
-+ reset-names = "phy",
-+ "phy_phy";
-+
-+ power-domains = <&gcc GCC_USB3_MP_SS1_PHY_GDSC>;
-+
-+ #clock-cells = <0>;
-+ clock-output-names = "usb_mp_phy1_pipe_clk";
-+
-+ #phy-cells = <0>;
-+
-+ status = "disabled";
-+ };
-+
- usb_1_ss2: usb@a0f8800 {
- compatible = "qcom,x1e80100-dwc3", "qcom,dwc3";
- reg = <0 0x0a0f8800 0 0x400>;
-@@ -3897,6 +4238,92 @@
- };
- };
+ dma-coherent;

-+ usb_mp: usb@a4f8800 {
-+ compatible = "qcom,x1e80100-dwc3-mp", "qcom,dwc3";
-+ reg = <0 0x0a4f8800 0 0x400>;
-+
-+ clocks = <&gcc GCC_CFG_NOC_USB3_MP_AXI_CLK>,
-+ <&gcc GCC_USB30_MP_MASTER_CLK>,
-+ <&gcc GCC_AGGRE_USB3_MP_AXI_CLK>,
-+ <&gcc GCC_USB30_MP_SLEEP_CLK>,
-+ <&gcc GCC_USB30_MP_MOCK_UTMI_CLK>,
-+ <&gcc GCC_AGGRE_USB_NOC_AXI_CLK>,
-+ <&gcc GCC_AGGRE_NOC_USB_NORTH_AXI_CLK>,
-+ <&gcc GCC_AGGRE_NOC_USB_SOUTH_AXI_CLK>,
-+ <&gcc GCC_SYS_NOC_USB_AXI_CLK>;
-+ clock-names = "cfg_noc",
-+ "core",
-+ "iface",
-+ "sleep",
-+ "mock_utmi",
-+ "noc_aggr",
-+ "noc_aggr_north",
-+ "noc_aggr_south",
-+ "noc_sys";
-+
-+ assigned-clocks = <&gcc GCC_USB30_MP_MOCK_UTMI_CLK>,
-+ <&gcc GCC_USB30_MP_MASTER_CLK>;
-+ assigned-clock-rates = <19200000>,
-+ <200000000>;
-+
-+ interrupts-extended = <&intc GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
-+ <&intc GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
-+ <&intc GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
-+ <&intc GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
-+ <&pdc 52 IRQ_TYPE_EDGE_BOTH>,
-+ <&pdc 51 IRQ_TYPE_EDGE_BOTH>,
-+ <&pdc 54 IRQ_TYPE_EDGE_BOTH>,
-+ <&pdc 53 IRQ_TYPE_EDGE_BOTH>,
-+ <&pdc 55 IRQ_TYPE_LEVEL_HIGH>,
-+ <&pdc 56 IRQ_TYPE_LEVEL_HIGH>;
-+ interrupt-names = "pwr_event_1", "pwr_event_2",
-+ "hs_phy_1", "hs_phy_2",
-+ "dp_hs_phy_1", "dm_hs_phy_1",
-+ "dp_hs_phy_2", "dm_hs_phy_2",
-+ "ss_phy_1", "ss_phy_2";
-+
-+ power-domains = <&gcc GCC_USB30_MP_GDSC>;
-+ required-opps = <&rpmhpd_opp_nom>;
-+
-+ resets = <&gcc GCC_USB30_MP_BCR>;
-+
-+ interconnects = <&usb_north_anoc MASTER_USB3_MP QCOM_ICC_TAG_ALWAYS
-+ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
-+ <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-+ &config_noc SLAVE_USB3_MP QCOM_ICC_TAG_ALWAYS>;
-+ interconnect-names = "usb-ddr",
-+ "apps-usb";
-+
-+ wakeup-source;
-+
-+ #address-cells = <2>;
-+ #size-cells = <2>;
-+ ranges;
-+
-+ status = "disabled";
-+
-+ usb_mp_dwc3: usb@a400000 {
-+ compatible = "snps,dwc3";
-+ reg = <0 0x0a400000 0 0xcd00>;
-+
-+ interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
-+
-+ iommus = <&apps_smmu 0x1400 0x0>;
-+
-+ phys = <&usb_mp_hsphy0>, <&usb_mp_qmpphy0>,
-+ <&usb_mp_hsphy1>, <&usb_mp_qmpphy1>;
-+ phy-names = "usb2-0", "usb3-0",
-+ "usb2-1", "usb3-1";
-+ dr_mode = "host";
-+
-+ snps,dis_u2_susphy_quirk;
-+ snps,dis_enblslpm_quirk;
-+ snps,usb3_lpm_capable;
-+
-+ dma-coherent;
-+ };
-+ };
-+
- usb_1_ss0: usb@a6f8800 {
- compatible = "qcom,x1e80100-dwc3", "qcom,dwc3";
- reg = <0 0x0a6f8800 0 0x400>;
-@@ -4215,11 +4642,11 @@
-
- mdss_dp0: displayport-controller@ae90000 {
- compatible = "qcom,x1e80100-dp";
-- reg = <0 0xae90000 0 0x200>,
-- <0 0xae90200 0 0x200>,
-- <0 0xae90400 0 0x600>,
-- <0 0xae91000 0 0x400>,
-- <0 0xae91400 0 0x400>;
-+ reg = <0 0x0ae90000 0 0x200>,
-+ <0 0x0ae90200 0 0x200>,
-+ <0 0x0ae90400 0 0x600>,
-+ <0 0x0ae91000 0 0x400>,
-+ <0 0x0ae91400 0 0x400>;
-
- interrupts-extended = <&mdss 12>;
-
-@@ -4298,11 +4725,11 @@
-
- mdss_dp1: displayport-controller@ae98000 {
- compatible = "qcom,x1e80100-dp";
-- reg = <0 0xae98000 0 0x200>,
-- <0 0xae98200 0 0x200>,
-- <0 0xae98400 0 0x600>,
-- <0 0xae99000 0 0x400>,
-- <0 0xae99400 0 0x400>;
-+ reg = <0 0x0ae98000 0 0x200>,
-+ <0 0x0ae98200 0 0x200>,
-+ <0 0x0ae98400 0 0x600>,
-+ <0 0x0ae99000 0 0x400>,
-+ <0 0x0ae99400 0 0x400>;
-
- interrupts-extended = <&mdss 13>;
-
-@@ -4381,11 +4808,11 @@
-
- mdss_dp2: displayport-controller@ae9a000 {
- compatible = "qcom,x1e80100-dp";
-- reg = <0 0xae9a000 0 0x200>,
-- <0 0xae9a200 0 0x200>,
-- <0 0xae9a400 0 0x600>,
-- <0 0xae9b000 0 0x400>,
-- <0 0xae9b400 0 0x400>;
-+ reg = <0 0x0ae9a000 0 0x200>,
-+ <0 0x0ae9a200 0 0x200>,
-+ <0 0x0ae9a400 0 0x600>,
-+ <0 0x0ae9b000 0 0x400>,
-+ <0 0x0ae9b400 0 0x400>;
-
- interrupts-extended = <&mdss 14>;
-
-@@ -4402,14 +4829,14 @@
-
- assigned-clocks = <&dispcc DISP_CC_MDSS_DPTX2_LINK_CLK_SRC>,
- <&dispcc DISP_CC_MDSS_DPTX2_PIXEL0_CLK_SRC>;
-- assigned-clock-parents = <&mdss_dp2_phy 0>,
-- <&mdss_dp2_phy 1>;
-+ assigned-clock-parents = <&usb_1_ss2_qmpphy QMP_USB43DP_DP_LINK_CLK>,
-+ <&usb_1_ss2_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
-
- operating-points-v2 = <&mdss_dp2_opp_table>;
-
- power-domains = <&rpmhpd RPMHPD_MMCX>;
-
-- phys = <&mdss_dp2_phy>;
-+ phys = <&usb_1_ss2_qmpphy QMP_USB43DP_DP_PHY>;
- phy-names = "dp";
-
- #sound-dai-cells = <0>;
-@@ -4463,11 +4890,11 @@
-
- mdss_dp3: displayport-controller@aea0000 {
- compatible = "qcom,x1e80100-dp";
-- reg = <0 0xaea0000 0 0x200>,
-- <0 0xaea0200 0 0x200>,
-- <0 0xaea0400 0 0x600>,
-- <0 0xaea1000 0 0x400>,
-- <0 0xaea1400 0 0x400>;
-+ reg = <0 0x0aea0000 0 0x200>,
-+ <0 0x0aea0200 0 0x200>,
-+ <0 0x0aea0400 0 0x600>,
-+ <0 0x0aea1000 0 0x400>,
-+ <0 0x0aea1400 0 0x400>;
-
- interrupts-extended = <&mdss 15>;
-
-@@ -4597,8 +5024,8 @@
- <&usb_1_ss0_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
- <&usb_1_ss1_qmpphy QMP_USB43DP_DP_LINK_CLK>, /* dp1 */
- <&usb_1_ss1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
-- <&mdss_dp2_phy 0>, /* dp2 */
-- <&mdss_dp2_phy 1>,
-+ <&usb_1_ss2_qmpphy QMP_USB43DP_DP_LINK_CLK>, /* dp2 */
-+ <&usb_1_ss2_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
- <&mdss_dp3_phy 0>, /* dp3 */
- <&mdss_dp3_phy 1>;
- power-domains = <&rpmhpd RPMHPD_MMCX>;
-@@ -4631,6 +5058,11 @@
- #clock-cells = <0>;
- };
-
-+ sram@c3f0000 {
-+ compatible = "qcom,rpmh-stats";
-+ reg = <0 0x0c3f0000 0 0x400>;
-+ };
-+
- spmi: arbiter@c400000 {
- compatible = "qcom,x1e80100-spmi-pmic-arb";
- reg = <0 0x0c400000 0 0x3000>,
-@@ -5241,12 +5673,50 @@
- bias-disable;
+@@ -5629,6 +5930,34 @@
+ };
};

-+ qup_uart2_default: qup-uart2-default-state {
++ qup_uart14_default: qup-uart14-default-state {
+ cts-pins {
-+ pins = "gpio8";
-+ function = "qup0_se2";
-+ drive-strength = <2>;
-+ bias-disable;
++ pins = "gpio56";
++ function = "qup1_se6";
++ bias-bus-hold;
+ };
+
+ rts-pins {
-+ pins = "gpio9";
-+ function = "qup0_se2";
++ pins = "gpio57";
++ function = "qup1_se6";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ tx-pins {
-+ pins = "gpio10";
-+ function = "qup0_se2";
++ pins = "gpio58";
++ function = "qup1_se6";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ rx-pins {
-+ pins = "gpio11";
-+ function = "qup0_se2";
-+ drive-strength = <2>;
-+ bias-disable;
++ pins = "gpio59";
++ function = "qup1_se6";
++ bias-pull-up;
+ };
+ };
+
qup_uart21_default: qup-uart21-default-state {
-- /* TX, RX */
-- pins = "gpio86", "gpio87";
-- function = "qup2_se5";
-- drive-strength = <2>;
-- bias-disable;
-+ tx-pins {
-+ pins = "gpio86";
-+ function = "qup2_se5";
-+ drive-strength = <2>;
-+ bias-disable;
-+ };
-+
-+ rx-pins {
-+ pins = "gpio87";
-+ function = "qup2_se5";
-+ drive-strength = <2>;
-+ bias-disable;
-+ };
- };
- };
-
-@@ -5384,6 +5854,13 @@
+ tx-pins {
+ pins = "gpio86";
+@@ -5780,6 +6109,13 @@
};
};

@@ -1015,7 +912,7 @@ Index: src/arm64/qcom/x1e80100.dtsi
apps_rsc: rsc@17500000 {
compatible = "qcom,rpmh-rsc";
reg = <0 0x17500000 0 0x10000>,
-@@ -5564,6 +6041,25 @@
+@@ -5960,6 +6296,25 @@
frame-number = <6>;

status = "disabled";
Index: sysutils/firmware/arm64-qcom-dtb/pkg/PLIST
===================================================================
RCS file: /cvs/ports/sysutils/firmware/arm64-qcom-dtb/pkg/PLIST,v
diff -u -p -r1.5 PLIST
--- sysutils/firmware/arm64-qcom-dtb/pkg/PLIST 22 Sep 2024 15:05:10 -0000 1.5
+++ sysutils/firmware/arm64-qcom-dtb/pkg/PLIST 25 Jan 2025 12:51:42 -0000
@@ -3,6 +3,12 @@ firmware/dtb/qcom/
firmware/dtb/qcom/sc8280xp-lenovo-thinkpad-x13s.dtb
firmware/dtb/qcom/x1e78100-lenovo-thinkpad-t14s.dtb
firmware/dtb/qcom/x1e80100-asus-vivobook-s15.dtb
+firmware/dtb/qcom/x1e80100-crd.dtb
+firmware/dtb/qcom/x1e80100-dell-xps13-9345.dtb
+firmware/dtb/qcom/x1e80100-honor-magicbook-art-14.dtb
firmware/dtb/qcom/x1e80100-hp-omnibook-x14.dtb
firmware/dtb/qcom/x1e80100-lenovo-yoga-slim7x.dtb
+firmware/dtb/qcom/x1e80100-microsoft-romulus13.dtb
+firmware/dtb/qcom/x1e80100-microsoft-romulus15.dtb
+firmware/dtb/qcom/x1e80100-qcp.dtb
firmware/dtb/qcom/x1e80100-samsung-galaxy-book4-edge.dtb