Thursday, September 03, 2026

Re: UPDATE: LLVM 22

On Fri, Aug 21, 2026 at 06:54:19PM -0400, Brad Smith wrote: > Back port some fixes from upstream. > > - A fix for the riscv64 builtins intrinsics to be able to build highway > on OpenBSD. > - A fix for mips64 to be able to build mariadb and gnuastro. Updated for -current. Ping. Index: Makefile =================================================================== RCS file: /cvs/ports/devel/llvm/22/Makefile,v retrieving revision 1.26 diff -u -p -u -p -r1.26 Makefile --- Makefile 3 Sep 2026 08:54:15 -0000 1.26 +++ Makefile 3 Sep 2026 20:43:56 -0000 @@ -2,7 +2,7 @@ LLVM_MAJOR = 22 LLVM_VERSION = ${LLVM_MAJOR}.1.8 LLVM_PKGSPEC = >=22,<23 -REVISION = 7 +REVISION = 8 SHARED_LIBS += LLVM 0.0 \ LTO 0.0 \ Index: patches/patch-clang_lib_Sema_SemaRISCV_cpp =================================================================== RCS file: patches/patch-clang_lib_Sema_SemaRISCV_cpp diff -N patches/patch-clang_lib_Sema_SemaRISCV_cpp --- /dev/null 1 Jan 1970 00:00:00 -0000 +++ patches/patch-clang_lib_Sema_SemaRISCV_cpp 3 Sep 2026 20:43:56 -0000 @@ -0,0 +1,33 @@ +- [RISCV] Use correct type for (u)int64_t in RVV intrinsics on OpenBSD + fd6d7a608909dc4ecea57e0155042d16f7b4e61a + +Index: clang/lib/Sema/SemaRISCV.cpp +--- clang/lib/Sema/SemaRISCV.cpp.orig ++++ clang/lib/Sema/SemaRISCV.cpp +@@ -132,10 +132,24 @@ static QualType RVVType2Qual(ASTContext &Context, cons + QT = Context.BoolTy; + break; + case ScalarTypeKind::SignedInteger: +- QT = Context.getIntTypeForBitwidth(Type->getElementBitwidth(), true); ++ // getIntTypeForBitwidth() picks a type purely by matching bit width, so ++ // on LP64 targets a 64-bit element would resolve to "long" even if the ++ // target's actual int64_t is "long long" (e.g. OpenBSD). Go through the ++ // target's Int64Type so this matches int64_t/uint64_t. ++ if (Type->getElementBitwidth() == 64) ++ QT = Context.getTargetInfo().getInt64Type() == TargetInfo::SignedLong ++ ? Context.LongTy ++ : Context.LongLongTy; ++ else ++ QT = Context.getIntTypeForBitwidth(Type->getElementBitwidth(), true); + break; + case ScalarTypeKind::UnsignedInteger: +- QT = Context.getIntTypeForBitwidth(Type->getElementBitwidth(), false); ++ if (Type->getElementBitwidth() == 64) ++ QT = Context.getTargetInfo().getInt64Type() == TargetInfo::SignedLong ++ ? Context.UnsignedLongTy ++ : Context.UnsignedLongLongTy; ++ else ++ QT = Context.getIntTypeForBitwidth(Type->getElementBitwidth(), false); + break; + case ScalarTypeKind::FloatE4M3: + case ScalarTypeKind::FloatE5M2: Index: patches/patch-llvm_lib_Target_Mips_MipsInstrInfo_cpp =================================================================== RCS file: patches/patch-llvm_lib_Target_Mips_MipsInstrInfo_cpp diff -N patches/patch-llvm_lib_Target_Mips_MipsInstrInfo_cpp --- /dev/null 1 Jan 1970 00:00:00 -0000 +++ patches/patch-llvm_lib_Target_Mips_MipsInstrInfo_cpp 3 Sep 2026 20:43:56 -0000 @@ -0,0 +1,17 @@ +- [Mips] Fix getInstSizeInBytes for instructions with delay slots + a97f512d71574c0b9adc9bc6216909387499e0e8 + +Index: llvm/lib/Target/Mips/MipsInstrInfo.cpp +--- llvm/lib/Target/Mips/MipsInstrInfo.cpp.orig ++++ llvm/lib/Target/Mips/MipsInstrInfo.cpp +@@ -708,6 +708,10 @@ bool MipsInstrInfo::isAsCheapAsAMove(const MachineInst + unsigned MipsInstrInfo::getInstSizeInBytes(const MachineInstr &MI) const { + switch (MI.getOpcode()) { + default: ++ if (MI.hasDelaySlot()) { ++ // instr + 1 nop ++ return MI.getDesc().getSize() + 4; ++ } + return MI.getDesc().getSize(); + case TargetOpcode::INLINEASM: + case TargetOpcode::INLINEASM_BR: { // Inline Asm: Variable size.

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